MC68331CEH20 Freescale Semiconductor, MC68331CEH20 Datasheet - Page 71

• Manufacturer Part Number: MC68331CEH20
• Description: IC MCU 32BIT 20MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 80Byte
• # I/os (max): 18
• Number Of Timers - General Purpose: 1
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

6.2 Capture/Compare Unit
MC68331TS/D
The capture/compare unit features three input capture channels, four output compare channels, and
one input capture/output compare channel (function selected by control register). These channels share
a 16-bit free-running counter (TCNT), which derives its clock from seven stages of a 9-stage prescaler
or from external clock input PCLK. This section, which is similar to the timer found on the MC68HC11F1,
also contains one pulse accumulator channel. The pulse accumulator logic includes its own 8-bit
counter and can operate in either event counting mode or gated time accumulation mode. Refer to the
following block diagrams of the GPT timer and prescaler.
Y = M111, where M is the logic state of the modmap (MM) bit in SIMCR.
Access
S
S
S
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
$YFF92E–
$YFF90C
$YFF91C
$YFF92C
$YFF900
$YFF902
$YFF904
$YFF906
$YFF908
$YFF90A
$YFF90E
$YFF910
$YFF912
$YFF914
$YFF916
$YFF918
$YFF91A
$YFF91E
$YFF920
$YFF922
$YFF924
$YFF926
$YFF928
$YFF92A
$YFF93F
Address
Freescale Semiconductor, Inc.
For More Information On This Product,
15
PGP DATA DIRECTION (DDRGP)
PWMA BUFFER (PWMBUFA)
FORCE COMPARE (CFORC)
TIMER CONTROL 1 (TCTL1)
OC1 ACTION MASK (OC1M)
PWM CONTROL A (PWMA)
TIMER MASK 1 (TMSK1)
TIMER FLAG 1 (TFLG1)
PA CONTROL (PACTL)
Table 26 GPT Address Map
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INPUT CAPTURE 4/OUTPUT COMPARE 5 (TI4/O5)
GPT MODULE CONFIGURATION (GPTMCR)
INTERRUPT CONFIGURATION (ICR)
OUTPUT COMPARE 1 (TOC1)
OUTPUT COMPARE 2 (TOC2)
OUTPUT COMPARE 3 (TOC3)
OUTPUT COMPARE 4 (TOC4)
GPT PRESCALER (PRESCL)
INPUT CAPTURE 1 (TIC1)
INPUT CAPTURE 2 (TIC2)
INPUT CAPTURE 3 (TIC3)
TIMER COUNTER (TCNT)
PWM COUNT (PWMCNT)
(RESERVED FOR TEST)
NOT USED
8 7
PWMB BUFFER (PWMBUFB)
TIMER CONTROL 2 (TCTL2)
OC1 ACTION DATA (OC1D)
PWM CONTROL C (PWMC)
PWM CONTROL B (PWMB)
TIMER MASK 2 (TMSK2)
PA COUNTER (PACNT)
TIMER FLAG 2 (TFLG2)
PGP DATA (PORTGP)
0
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