MCF5216CVM66J Freescale Semiconductor, MCF5216CVM66J Datasheet - Page 436
MCF5216CVM66J
Manufacturer Part Number
MCF5216CVM66J
Description
IC MCU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF521xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5216CVM66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF521x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52210DEMO, M52211EVB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5216CVM66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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UART Modules
23.3.13 UART Output Port Command Registers (UOP1n/UOP0n)
The URTSn output can be asserted by writing a 1 to UOP1n[RTS] and negated by writing a 1 to
UOP0n[RTS].
23.4
This section describes operation of the clock source generator, transmitter, and receiver.
23.4.1
The internal bus clock serves as the basic timing reference for the clock source generator logic, which
consists of a clock generator and a programmable 16-bit divider dedicated to each UART. The 16-bit
divider is used to produce standard UART baud rates.
23-16
Field
Field
CTS
RTS
7–1
7–1
0
0
IPSBAR
Offset:
Reset:
Reserved
Current state of clear-to-send. The UCTSn value is latched and reflects the state of the input pin when UIPn is read.
Note: This bit has the same function and value as UIPCRn[CTS].
0 The current state of the UCTSn input is logic 0.
1 The current state of the UCTSn input is logic 1.
Reserved, must be cleared.
Output port output. Controls assertion (UOP1)/negation (UOP0) of URTSn output.
0 Not affected.
1 Asserts URTSn in UOP1. Negates URTSn in UOP0.
Functional Description
W
R
Transmitter/Receiver Clock Source
0x00_0238 (UOP10)
0x00_023C (UOP00)
0x00_0278 (UOP11)
0x00_027C (UOP01)
0x00_02B8 (UOP12)
0x00_02BC (UOP02)
0
0
7
Figure 23-16. UART Output Port Command Registers (UOP1n/UOP0n)
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
6
0
0
Table 23-12. UOP1n/UOP0n Field Descriptions
Table 23-11. UIPn Field Descriptions
0
0
5
0
0
4
Description
Description
0
0
3
0
0
2
Access: User write-only
Freescale Semiconductor
0
0
1
RTS
0
0
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