MCF5216CVM66J Freescale Semiconductor, MCF5216CVM66J Datasheet - Page 256
MCF5216CVM66J
Manufacturer Part Number
MCF5216CVM66J
Description
IC MCU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF521xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5216CVM66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF521x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52210DEMO, M52211EVB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5216CVM66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- Current page: 256 of 766
- Download datasheet (9Mb)
Signal Descriptions
14-16
C12:D12:A13:B13
C13:A14:B14:A15
MAPBGA Pin
P5:T1
R10
N10
P10
T10
J14
J13
R2
R1
R4
P3
R3
P4
R9
P9
R5
P2
N8
T3
T2
T4
T5
T9
Table 14-3. MCF5282 Signals and Pin Numbers Sorted by Function (continued)
DDATA[3:0]
JTAG_EN
Primary
DTOUT0
PST[3:0]
VDDPLL
DSCLK
DTIN0
VDDH
VDDA
VSSA
AN52
AN53
AN55
AN56
TCLK
BKPT
TEST
VRH
DSO
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
AN0
AN1
AN2
AN3
VRL
DSI
2
Pin Functions
Queued Analog-to-Digital Converter (QADC)
Secondary
PDD[7:4]
PDD[3:0]
Debug and JTAG Test Port Control
PQB0
PQB1
PQB2
PQB3
PQA0
PQA1
PQA3
PQA4
PTD1
PTD0
TRST
TMS
TDO
TDI
—
—
—
—
—
—
—
—
—
Power Supplies
Tertiary
UCTS1/
UCTS1/
ETRIG1
ETRIG2
UCTS0
UCTS0
ANW
ANX
ANY
ANZ
MA0
MA1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Test
Timer 0 in
Timer 0 out
Analog channel 0
Analog channel 1
Analog channel 2
Analog channel 3
Analog channel 52
Analog channel 53
Analog channel 55
Analog channel 56
High analog reference
Low analog reference
JTAG Enable
Debug clock / TAP reset
TAP clock
Breakpoint/TAP test mode select
Debug data in / TAP data in
Debug data out / TAP data out
Debug data
Processor status data
Test mode pin
Analog positive supply
Analog ground
ESD positive supply
PLL positive supply
Description
Freescale Semiconductor
Primary
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
I
I
I
I
I
I
I
I
I
I
Pull-up
Internal
Yes
Yes
Yes
Yes
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
7
7
7
7
1
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