DF36054FPJV Renesas Electronics America, DF36054FPJV Datasheet - Page 410

• Manufacturer Part Number: DF36054FPJV
• Description: MCU 3/5V 32K J-TEMP PB-FREE 64-L
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of DF36054FPJV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SSU
• Peripherals: PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 16 Synchronous Serial Communication Unit (SSU)
16.4.10 SCS Pin Control and Arbitration
When the SSUMS bit in SSCRL is set to 1 and the CSS1 bit in SSCRH is set to 1, the MSS bit in
SSCRH is set to 1 and then the arbitration of the SCS pin is checked before starting serial transfer.
If the SSU detects that the synchronized internal SCS pin goes low in this period, the CE bit in
SSSR is set and the MSS bit is cleared.
Note: When a conflict error is set, subsequent transmit operation is not possible. Therefore the
Rev. 4.00 Mar. 15, 2006 Page 376 of 556
REJ09B0026-0400
SCS input
Internal SCS
(synchronized)
MSS
Transfer start
SCS output
CE bit must be cleared to 0 before starting transmission.
When the multimaster error is used, the CSOS bit in SSCRL should be set to 1.
CE
Figure 16.13 Arbitration Check Timing
Arbitration detection
Write data
in SSTDR
period
Maximum time of SCS internal synchronization