D12312SVTE25 Renesas Electronics America, D12312SVTE25 Datasheet - Page 570
![MCU 3V 0K 100-TQFP](/photos/28/61/286108/100-tqfp_sml.jpg)
D12312SVTE25
Manufacturer Part Number
D12312SVTE25
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.D12312SVTE25V.pdf
(1146 pages)
Specifications of D12312SVTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412312SVTE25
HD6412312SVTE25
HD6412312SVTE25
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12312SVTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 570 of 1146
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Section 14 A/D Converter (8 Analog Input Channel Version)
14.2.2
Note: * Only 0 can be written to bit 7, to clear this flag.
ADCSR is an 8-bit readable/writable register that controls A/D conversion operations and shows
the status of the operation.
ADCSR is initialized to H'00 by a reset, and in standby mode or module stop mode.
Bit 7—A/D End Flag (ADF): Status flag that indicates the end of A/D conversion.
Bit 7
ADF
0
1
Bit 6—A/D Interrupt Enable (ADIE): Selects enabling or disabling of interrupt (ADI) requests
at the end of A/D conversion.
Bit 6
ADIE
0
1
Rev.7.00 Feb. 14, 2007 page 536 of 1108
REJ09B0089-0700
Bit
Initial value :
R/W
A/D Control/Status Register (ADCSR)
Description
[Clearing conditions]
•
•
[Setting conditions]
•
•
Description
A/D conversion end interrupt (ADI) request disabled
A/D conversion end interrupt (ADI) request enabled
:
:
When 0 is written to the ADF flag after reading ADF = 1
When the DTC is activated by an ADI interrupt and ADDR is read
Single mode: When A/D conversion ends
Scan mode:
R/(W) *
ADF
7
0
ADIE
R/W
When A/D conversion ends on all specified channels
6
0
ADST
R/W
5
0
SCAN
R/W
4
0
CKS
R/W
3
0
CH2
R/W
2
0
CH1
R/W
1
0
(Initial value)
(Initial value)
CH0
R/W
0
0
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