D12312SVTE25 Renesas Electronics America, D12312SVTE25 Datasheet - Page 213

MCU 3V 0K 100-TQFP

D12312SVTE25

Manufacturer Part Number
D12312SVTE25
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of D12312SVTE25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412312SVTE25
HD6412312SVTE25

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12312SVTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
6.7.4
Figure 6.19 shows the timing for transition to the bus released state.
Address bus
HWR, LWR
BREQO *
Data bus
[1]
[2]
[3]
[4]
[5]
[6]
Note: * Output only when BREQOE is set to 1.
BREQ
BACK
Low level of BREQ pin is sampled at rise of T
BACK pin is driven low at end of CPU read cycle, releasing bus to external
bus master.
BREQ pin state is still sampled in external bus released state.
High level of BREQ pin is sampled.
BACK pin is driven high, ending bus release cycle.
BREQO signal goes high 1.5 clocks after BACK signal goes high.
RD
AS
Transition Timing
φ
T
0
Figure 6.19 Bus Released State Transition Timing
CPU cycle
T
Address
1
[1]
Minimum
1 state
T
2
[2]
2
state.
External bus released state
[3]
Rev.7.00 Feb. 14, 2007 page 179 of 1108
High impedance
High impedance
High impedance
High impedance
High impedance
[4]
Section 6 Bus Controller
[5]
REJ09B0089-0700
cycle
CPU
[6]

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