DF2212CUNP24V Renesas Electronics America, DF2212CUNP24V Datasheet - Page 399

MCU 16BIT FLASH 3V 128K 64-QFN

DF2212CUNP24V

Manufacturer Part Number
DF2212CUNP24V
Description
MCU 16BIT FLASH 3V 128K 64-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of DF2212CUNP24V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2212CUNP24V
Manufacturer:
Renesas Electronics America
Quantity:
135
10.3
10.3.1
To use the WDT as a watchdog timer, set the WT/IT bit in TCSR and the TME bit to 1.
TCNT does not overflow while the system is operating normally. Software must prevent TCNT
overflows by rewriting the TCNT value (normally be writing H'00) before overflows occurs.
When the RSTE bit of the RSTCSR is set to 1, and if the TCNT overflows, an internal reset signal
for this LSI is issued. In this case, select power-on reset or manual reset* by setting the RSTS bit
of the RSTCSR to 0.
If a reset caused by a signal input to the RES pin occurs at the same time as a reset caused by a
WDT overflow, the RES pin reset has priority and the WOVF bit in RSTCSR is cleared to 0. The
internal reset signal is output for 518 states.
When the TCNT overflows in watchdog timer mode, the WOVF bit of the RSTCSR is set to 1. If
the RSTE bit of the RSTCSR has been set to 1, an internal reset signal for the entire LSI is
generated at TCNT overflow.
Note: * Supported only by the H8S/2218 Group.
Operation
Watchdog Timer Mode
Internal reset signal*
Legend:
WT/IT:
TME:
Note: * With WDT0, the internal reset signal is generated only when the RSTE bit is set to 1.
H'FF
H'00
Timer mode select bit
Timer enabl bit
TCNT value
Figure 10.2 Operation in Watchdog Timer Mode
WT/IT = 1
TME = 1
H'00 written
to TCNT
Internal reset
generated
518 states (WDT0)
Overflow
WOVF = 1
Rev.7.00 Dec. 24, 2008 Page 343 of 698
WT/IT = 1
TME = 1
H'00 written
to TCNT
REJ09B0074-0700
Time

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