MC68HC705C8AFNE Freescale Semiconductor, MC68HC705C8AFNE Datasheet - Page 48

IC MCU 8BIT 44-PLCC

MC68HC705C8AFNE

Manufacturer Part Number
MC68HC705C8AFNE
Description
IC MCU 8BIT 44-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705C8AFNE

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
304 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Processor Series
HC705C
Core
HC05
Data Bus Width
8 bit
Data Ram Size
304 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2.1 MHz
Number Of Programmable I/os
24
Number Of Timers
1
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC705C8AFNE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Central Processor Unit (CPU)
3.4 Arithmetic/Logic Unit (ALU)
Technical Data
48
N — Negative Flag
Z — Zero Flag
C — Carry/Borrow Flag
The arithmetic/logic unit (ALU) performs the arithmetic and logical
operations defined by the instruction set. The binary arithmetic circuits
decode instructions and set up the ALU for the selected operation. Most
binary arithmetic is based on the addition algorithm, carrying out
subtraction as negative addition. Multiplication is not performed as a
discrete operation but as a chain of addition and shift operations within
the ALU. The multiply instruction requires 11 internal clock cycles to
complete this chain of operations.
The CPU sets the negative flag when an arithmetic operation, logical
operation, or data manipulation produces a negative result (bit 7 in the
results is a logic 1). Reset has no effect on the negative flag.
The CPU sets the zero flag when an arithmetic operation, logical
operation, or data manipulation produces a result of $00. Reset has
no effect on the zero flag.
The CPU sets the carry/borrow flag when an addition operation
produces a carry out of bit 7 of the accumulator or when a subtraction
operation requires a borrow. Some logical operations and data
manipulation instructions also clear or set the carry/borrow bit. Reset
has no effect on the carry/borrow flag.
Freescale Semiconductor, Inc.
For More Information On This Product,
Central Processor Unit (CPU)
Go to: www.freescale.com
MC68HC705C8A — Rev. 3

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