MC68HC705C8AFNE Freescale Semiconductor, MC68HC705C8AFNE Datasheet - Page 41

IC MCU 8BIT 44-PLCC

MC68HC705C8AFNE

Manufacturer Part Number
MC68HC705C8AFNE
Description
IC MCU 8BIT 44-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705C8AFNE

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
304 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Processor Series
HC705C
Core
HC05
Data Bus Width
8 bit
Data Ram Size
304 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2.1 MHz
Number Of Programmable I/os
24
Number Of Timers
1
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC705C8AFNE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
MC68HC705C8A — Rev. 3
MOTOROLA
$0013
$0014
$0015
$0016
$0017
$0018
$0019
$001A
$001B
Addr.
Output Compare Register
Output Compare Register
Alternate Timer Register
Alternate Timer Register
Input Capture Register
Input Capture Register
Timer Status Register
Timer Register High
Timer Register Low
Register Name
See page 100.
See page 100.
See page 101.
See page 101.
See page 96.
High (OCRH)
See page 97.
See page 97.
See page 99.
See page 99.
High (ATRH)
Low (OCRL)
High (ICRH)
Low (ATRL)
Low (ICRL)
Figure 2-2. I/O Register Summary (Sheet 3 of 4)
(TRH)
(TSR)
(TRL)
Freescale Semiconductor, Inc.
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
For More Information On This Product,
Read:
Read: Bit 15
Read:
Read:
Read:
Read: Bit 15
Read:
Read: Bit 15
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
ICF
Go to: www.freescale.com
U
= Unimplemented
Bit 14
Bit 14
Bit 14
Bit 14
OCF
Bit 6
Bit 6
Bit 6
Bit 6
U
6
Memory
Bit 13
Bit 13
Bit 13
Bit 13
TOF
Bit 5
Bit 5
Bit 5
Bit 5
U
5
Reset initializes ATRH to $FF
Reset initializes ATRL to $FC
Reset initializes TRH to $FF
Reset initializes TRL to $FC
U = Unaffected
Bit 12
Unaffected by reset
Unaffected by reset
Bit 12
Unaffected by reset
Unaffected by reset
Bit 12
Bit 12
Bit 4
Bit 4
Bit 4
Bit 4
4
0
0
Bit 11
Bit 11
Bit 11
Bit 11
Bit 3
Bit 3
Bit 3
Bit 3
3
0
0
Bit 10
Bit 10
Bit 10
Bit 10
Bit 2
Bit 2
Bit 2
Bit 2
2
0
0
Bootloader ROM
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Technical Data
1
0
0
Memory
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
0
0

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