R5F21294SNSP#U0 Renesas Electronics America, R5F21294SNSP#U0 Datasheet - Page 289

• Manufacturer Part Number: R5F21294SNSP#U0
• Description: MCU 3/5V 16K+2K 20PIN-SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/29r

Specifications of R5F21294SNSP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/28 Group, R8C/29 Group
Rev.2.10
REJ09B0279-0210
16.2.5.4
Data transmission/reception is an operation combining data transmission and reception which were described
earlier. Transmission/reception is started by writing data to the SSTDR register.
When the 8th clock rises or the ORER bit is set to 1 (overrun error) while the TDRE bit is set to 1 (data is
transferred from registers SSTDR to SSTRSR), the transmit/receive operation is stopped.
When switching from transmit mode (TE = 1) or receive mode (RE = 1) to transmit/receive mode (Te = RE =
1), set the TE bit to 0 and RE bit to 0 before switching. After confirming that the TEND bit is set to 0 (the
TDRE bit is set to 0 when the last bit of the transmit data is transmitted), the RDRF bit is set to 0 (no data in the
SSRDR register), and the ORER bit is set to 0 (no overrun error), set bits TE and RE to 1.
Figure 16.17 shows a Sample Flowchart of Data Transmission/Reception (Clock Synchronous Communication
Mode).
When exiting transmit/receive mode after this mode is used (TE = RE = 1), a clock may be output if
transmit/receive mode is exited after reading the SSRDR register. To avoid any clock outputs, perform either of
the following:
- First set the RE bit to 0, and then set the TE bit to 0.
- Set bits TE and RE at the same time.
When subsequently switching to receive mode (TE = 0 and RE = 1), first set the SRES bit to 1, and set this bit
to 0 to reset the clock synchronous serial interface control unit and the SSTRSR register. Then, set the RE bit to
1.
Sep 26, 2008
Data Transmission/Reception
Page 270 of 441
16. Clock Synchronous Serial Interface