R5F21294SNSP#U0 Renesas Electronics America, R5F21294SNSP#U0 Datasheet - Page 263

• Manufacturer Part Number: R5F21294SNSP#U0
• Description: MCU 3/5V 16K+2K 20PIN-SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/29r

Specifications of R5F21294SNSP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/28 Group, R8C/29 Group
Rev.2.10
REJ09B0279-0210
Table 15.5
i = 0 or 1
NOTES:
Table 15.6
UiTB
UiRB
UiBRG
UiMR
UiC0
UiC1
TXD0 (P1_4)
RXD0 (P1_5)
CLK0 (P1_6)
TXD1 (P3_7)
RXD1 (either
P3_7 or P4_5)
Table 15.6 lists the I/O Pin Functions in UART Mode. After the UARTi (i = 0 or 1) operating mode is selected, the
TXDi pin outputs “H” level. (If the NCH bit is set to 1 (N-channel open-drain output), this pin is in a high-
impedance state) until transfer starts.)
Register
1. The bits used for transmit/receive data are as follows: Bits 0 to 6 when transfer data is 7 bits long;
2. The following bits are undefined: Bits 7 and 8 when transfer data is 7 bits long; bit 8 when transfer
Pin name
bits 0 to 7 when transfer data is 8 bits long; bits 0 to 8 when transfer data is 9 bits long.
data is 8 bits long.
Sep 26, 2008
Registers Used and Settings for UART Mode
I/O Pin Functions in UART Mode
0 to 8
0 to 8
OER, FER, PER, SUM Error flag
0 to 7
SMD2 to SMD0
CKDIR
STPS
PRY, PRYE
CLK0 to CLK1
TXEPT
NCH
CKPOL
UFORM
TE
TI
RE
RI
UiIRS
UiRRM
Output serial data
Input serial data
Programmable I/O Port CKDIR bit in U0MR register = 0
Input transfer clock
Output serial data
Input serial data
Page 244 of 441
Function
Bit
Set transmit data
Receive data can be read
Set a bit rate
Set to 100b when transfer data is 7 bits long.
Set to 101b when transfer data is 8 bits long.
Set to 110b when transfer data is 9 bits long.
Select the internal clock or external clock
Select the stop bit
Select whether parity is included and whether odd or even
Select the count source for the UiBRG register
Transmit register empty flag
Select TXDi pin output mode
Set to 0
LSB first or MSB first can be selected when transfer data is 8 bits
long. Set to 0 when transfer data is 7 or 9 bits long.
Set to 1 to enable transmit
Transmit buffer empty flag
Set to 1 to enable receive
Receive complete flag
Select the source of UARTi transmit interrupt
Set to 0
(Cannot be used as a port when performing reception only)
PD1_5 bit in PD1 register = 0
(P1_5 can be used as an input port when performing transmission only)
CKDIR bit in U0MR register = 1
PD1_6 bit in PD1 register = 0
Set registers PINSR1 and PMR (refer to Figure 15.7 Registers
PINSR1 and PMR )
(Cannot be used as a port when performing reception only)
PINSR1 and PMR )
Corresponding bit in each port direction register = 0
(Can be used as an input port when performing transmission only)
Set registers PINSR1 and PMR (refer to Figure 15.7 Registers
(1)
Selection Method
(1, 2)
Function
15. Serial Interface