MC908MR8MPE Freescale Semiconductor, MC908MR8MPE Datasheet - Page 240

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MC908MR8MPE

Manufacturer Part Number
MC908MR8MPE
Description
IC MCU 8BIT 8K FLASH 28-PDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908MR8MPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM
Number Of I /o
12
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Timer Interface B (TIMB)
12.10.2 TIMB Counter Registers
Technical Data
240
NOTE:
Register Name and Ad-
dress:
Register Name and Ad-
dress:
The two read-only TIMB counter registers contain the high and low bytes
of the value in the TIMB counter. Reading the high byte (TBCNTH)
latches the contents of the low byte (TBCNTL) into a buffer. Subsequent
reads of TBCNTH do not affect the latched TBCNTL value until TBCNTL
is read. Reset clears the TIMB counter registers. Setting the TIMB reset
bit (TRST) also clears the TIMB counter registers.
If TBCNTH is read during a break interrupt, be sure to unlatch TBCNTL
by reading TBCNTL before exiting the break interrupt. Otherwise,
TBCNTL retains the value latched during the break.
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 12-5. TIMB Counter Registers (TBCNTH and TBCNTL)
Bit 15
Bit 7
Bit 7
Bit 7
R
R
R
0
0
Timer Interface B (TIMB)
= Reserved
Bit 14
Bit 6
R
R
6
0
6
0
TBCNTH — $0052
TBCNTL — $0053
Bit 13
Bit 5
R
R
5
0
5
0
Bit 12
Bit 4
R
R
4
0
4
0
Bit 11
Bit 3
R
R
3
0
3
0
MC68HC908MR8 — Rev 4.1
Bit 10
Bit 2
Freescale Semiconductor
R
R
2
0
2
0
Bit 9
Bit 1
R
R
1
0
1
0
Bit 0
Bit 8
Bit 0
Bit 0
R
R
0
0

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