MC908MR8MPE Freescale Semiconductor, MC908MR8MPE Datasheet - Page 204

• Manufacturer Part Number: MC908MR8MPE
• Description: IC MCU 8BIT 8K FLASH 28-PDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908MR8MPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 12
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Timer Interface A (TIMA)
11.4 Functional Description
11.4.1 TIMA Counter Prescaler
11.4.2 Input Capture
Technical Data
204
Figure 11-1
TIMA is the 16-bit TIMA counter that can operate as a free-running
counter or a modulo up-counter. The TIMA counter provides the timing
reference for the input capture and output compare functions. The TIMA
counter modulo registers, TAMODH–TAMODL, control the modulo
value of the TIMA counter. Software can read the TIMA counter value at
any time without affecting the counting sequence.
The two TIMA channels are programmable independently as input
capture or output compare channels.
The TIMA clock source can be one of the seven prescaler outputs or the
TIMA clock pin, PTB2/TCLKA. The prescaler generates seven clock
rates from the internal bus clock. The prescaler select bits, PS[2:0], in
the TIMA status and control register select the TIMA clock source.
An input capture function has three basic parts:
Two 8-bit registers, which make up the 16-bit input capture register, are
used to latch the value of the free-running counter after the
corresponding input capture edge detector senses a defined transition.
The polarity of the active edge is programmable. The level transition
which triggers the counter transfer is defined by the corresponding input
edge bits (ELSxB and ELSxA in the TASC0 and TASC1 control registers
with x referring to the active channel number).
When an active edge occurs on the pin of an input capture channel, the
TIMA latches the contents of the TIMA counter into the TIMA channel
registers, TCHxH–TCHxL. Input captures can generate TIMA CPU
interrupt requests. Software can determine that an input capture event
1. Edge select logic
2. Input capture latch
3. 16-bit counter
shows the TIMA structure. The central component of the
Timer Interface A (TIMA)
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor