M38503G4AFP#U1 Renesas Electronics America, M38503G4AFP#U1 Datasheet - Page 50

IC 740/3850 MCU QZ-ROM 42SSOP

M38503G4AFP#U1

Manufacturer Part Number
M38503G4AFP#U1
Description
IC 740/3850 MCU QZ-ROM 42SSOP
Manufacturer
Renesas Electronics America
Series
740/38000r
Datasheet

Specifications of M38503G4AFP#U1

Core Processor
740
Core Size
8-Bit
Speed
12.5MHz
Connectivity
SIO, UART/USART
Peripherals
PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
QzROM
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
42-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Quantity
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Company:
Part Number:
M38503G4AFP#U1M38503G4AFP
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Quantity:
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Company:
Part Number:
M38503G4AFP#U1
Manufacturer:
RENESAS
Quantity:
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3850 Group (Spec.A QzROM version)
Rev.2.13
REJ03B0125-0213
Switching characteristics
Table 18 Switching characteristics (1) (V
NOTES:
Table 19 Switching characteristics (2) (V
NOTES:
Fig 47. Circuit for measuring output switching characteristics
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
WH
WL
d
V
r
f
WH
WL
d
V
f
r
f
WH
WL
d
V
r
f
WH
WL
d
V
f
r
f
(S
(S
(S
(CMOS)
(CMOS)
(S
(S
(S
(CMOS)
(CMOS)
(S
(S
1. When the P2
2. When the P0
3. The X
(S
(S
1. When the P2
2. When the P0
3. The X
(S
(S
(S
(S
Measurement output pin
(S
(S
(S
(S
CLK1
CLK2
CLK1
CLK2
(S
CLK1
(S
(S
CLK1
(S
CLK1
CLK2
CLK1
CLK2
CLK1
CLK2
CLK1
CLK2
Symbol
Symbol
CLK1
CLK2
CLK1
CLK2
CLK1
CLK2
CLK1
CLK2
)
)
)
)
)
)
-T
-S
-T
-S
-T
-S
-T
-S
)
)
)
)
)
)
)
)
X
X
OUT2
OUT2
X
X
OUT2
OUT2
OUT
OUT
D)
D)
D)
D)
Apr 17, 2009
)
pin is excluded.
)
)
)
pin is excluded.
1
5
5
1
Serial I/O1 clock output “H” pulse width
Serial I/O1 clock output “L” pulse width
Serial I/O1 output delay time
Serial I/O1 output valid time
Serial I/O1 clock output rising time
Serial I/O1 clock output falling time
Serial I/O2 clock output “H” pulse width
Serial I/O2 clock output “L” pulse width
Serial I/O2 output delay time
Serial I/O2 output valid time
Serial I/O2 clock output falling time
CMOS output rising time
CMOS output falling time
/S
Serial I/O1 clock output “H” pulse width
Serial I/O1 clock output “L” pulse width
Serial I/O1 output delay time
Serial I/O1 output valid time
Serial I/O1 clock output rising time
Serial I/O1 clock output falling time
Serial I/O2 clock output “H” pulse width
Serial I/O2 clock output “L” pulse width
Serial I/O2 output delay time
Serial I/O2 output valid time
Serial I/O2 clock output falling time
CMOS output rising time
CMOS output falling time
/T
/T
/S
OUT2
X
X
OUT2
D P-channel output disable bit of the UART control register (bit 4 of address 001B
D P-channel output disable bit of the UART control register (bit 4 of address 001B
and P0
and P0
2
2
/S
Page 48 of 56
/S
Parameter
Parameter
CLK2
CLK2
CMOS output
P-channel output disable bit of the Serial I/O2 control register 1 (bit 7 of address 0015
P-channel output disable bit of the Serial I/O2 control register 1 (bit 7 of address 0015
(3)
(3)
(3)
(3)
CC
CC
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
= 4.0 to 5.5 V, V
= 2.7 to 5.5 V, V
100pF
Test conditions
Test conditions
SS
SS
Fig. 47
Fig. 47
= 0 V, Ta = − 20 to 85 °C, unless otherwise noted)
= 0 V, Ta = − 20 to 85 °C, unless otherwise noted)
t
t
t
t
t
t
C
C
t
t
C
C
C
C
C
C
(S
(S
(S
(S
(S
(S
(S
(S
CLK2
CLK2
CLK2
CLK2
CLK1
CLK1
CLK1
CLK1
Min.
Min.
− 30
− 30
0
0
)/2 − 160
)/2 − 160
)/2 − 240
)/2 − 240
)/2 − 30
)/2 − 30
)/2 − 50
)/2 − 50
Limits
Limits
16
16
Typ.
Typ.
) is “0”.
) is “0”.
10
10
20
20
Max.
Max.
140
200
350
400
30
30
30
30
30
50
50
50
50
50
16
) is “0”.
16
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
) is “0”.

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