R5F211B1SP#U0 Renesas Electronics America, R5F211B1SP#U0 Datasheet - Page 47

• Manufacturer Part Number: R5F211B1SP#U0
• Description: IC R8C MCU FLASH 4K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/1Br

Specifications of R5F211B1SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, SSU, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K5211B4S001BE - KIT STARTER FOR R8C/18191A1BR0K5211B4S000BE - KIT DEV EVALUATION R8C/1BR0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.2.00 Oct 17, 2005
REJ09B0001-0200
2.4 Special Instruction Addressing
Chapter 2 Addressing Modes
dsp:20[A0]
dsp:20[A1]
[A1A0]
20-bit absolute
abs20
Address register relative with 20-bit displacement
32-bit address register indirect
The address indicated by the displacement
(dsp) plus the content of the address
register (A0/A1)—added without the sign
bits—is the effective address for the
operation.
However, if the addition results in a value
exceeding FFFFF
ignored, and the address returns to
00000
This addressing mode can be used with
the LDE, STE, JMPI, and JSRI instructions.
Valid addressing mode and instruction
combinations are as follows.
dsp: 20[A0]
dsp: 20[A1]
The value indicated by abs20 is the
effective address for the operation.
The effective address range is 00000
FFFFF
This addressing mode can be used with
the LDE, STE, JSR, and JMP instructions.
The address indicated by the 32
concatenated bits of the address
registers (A0 and A1) is the effective
address for the operation.
However, if the concatenated register
value exceeds FFFFF
above are ignored.
This addressing mode can be used
with the LDE and STE instructions.
16
16
page 27 of 263
.
.
LDE, STE, JMPI, and JSRI
instructions
JMPI and JSRI instructions
16
, bits 21 and above are
16
, bits 21 and
16
to
A0 / A1
LDE, STE instructions
JMPI, JSRI instructions
b31
A0
address-H
A1
abs20
Register
address
Register
address
Register
PC
2.4 Special Instruction Addressing
address
b16 b15
address-L
Memory
dsp
dsp
Memory
A0
b0
Memory
Memory