S9S08AW60E5MFDE Freescale Semiconductor, S9S08AW60E5MFDE Datasheet - Page 172

• Manufacturer Part Number: S9S08AW60E5MFDE
• Description: MCU 64K FLASH AUTO MONET 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of S9S08AW60E5MFDE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Controller Family/series: HCS08
• No. Of I/o's: 38
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Chapter 10 Timer/Pulse-Width Modulator (S08TPMV2)
When background mode is active, the timer counter and the coherency mechanism are frozen such that the
buffer latches remain in the state they were in when the background mode became active even if one or
both bytes of the counter are read while background mode is active.
10.4.3
The read/write TPM modulo registers contain the modulo value for the TPM counter. After the TPM
counter reaches the modulo value, the TPM counter resumes counting from 0x0000 at the next clock
(CPWMS = 0) or starts counting down (CPWMS = 1), and the overflow flag (TOF) becomes set. Writing
to TPMxMODH or TPMxMODL inhibits TOF and overflow interrupts until the other byte is written. Reset
sets the TPM counter modulo registers to 0x0000, which results in a free-running timer counter (modulo
disabled).
It is good practice to wait for an overflow interrupt so both bytes of the modulo register can be written well
before a new overflow. An alternative approach is to reset the TPM counter before writing to the TPM
modulo registers to avoid confusion about when the first counter overflow will occur.
172
Reset
Reset
Reset
W
W
W
R
R
R
Bit 15
Timer x Counter Modulo Registers (TPMxMODH:TPMxMODL)
Bit 7
Bit 7
0
0
0
7
7
7
Figure 10-6. Timer x Counter Modulo Register High (TPMxMODH)
Figure 10-7. Timer x Counter Modulo Register Low (TPMxMODL)
Figure 10-5. Timer x Counter Register Low (TPMxCNTL)
14
6
0
0
6
0
6
6
6
Any write to TPMxCNTL clears the 16-bit counter.
13
5
0
0
5
0
5
5
5
MC9S08AW60 Data Sheet, Rev 2
12
4
0
0
4
0
4
4
4
11
3
3
0
3
0
3
3
0
10
2
0
0
2
0
2
2
2
Freescale Semiconductor
1
0
9
0
1
0
1
1
1
Bit 0
Bit 8
Bit 0
0
0
0
0
0
0