MC9S08AC48MFDE Freescale Semiconductor, MC9S08AC48MFDE Datasheet - Page 101
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MC9S08AC48MFDE
Manufacturer Part Number
MC9S08AC48MFDE
Description
MCU 8BIT 48K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08AC60CFJE.pdf
(348 pages)
Specifications of MC9S08AC48MFDE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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6.6.11
Port F parallel I/O function is controlled by the registers listed below.
Freescale Semiconductor
PTFDDn
Reset
Reset
PTFDn
Field
Field
7:0
7:0
W
W
R
R
PTFDD7
PTFD7
Port F I/O Registers (PTFD and PTFDD)
Port F Data Register Bits— For port F pins that are inputs, reads return the logic level on the pin. For port F
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port F pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTFD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pullups disabled.
Data Direction for Port F Bits — These read/write bits control the direction of port F pins and what is read for
PTFD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port F bit n and PTFD reads return the contents of PTFDn.
0
0
7
7
PTFDD6
PTFD6
0
0
6
6
Table 6-27. PTFDD Register Field Descriptions
Figure 6-28. Data Direction for Port F (PTFDD)
Table 6-26. PTFD Register Field Descriptions
Figure 6-27. Port F Data Register (PTFD)
PTFDD5
MC9S08AC60 Series Data Sheet, Rev. 2
PTFD5
0
0
5
5
PTFDD4
PTFD4
0
0
4
4
Description
Description
PTFDD3
PTFD3
3
0
3
0
PTFDD2
PTFD2
0
0
2
2
Chapter 6 Parallel Input/Output
PTFDD1
PTFD1
0
0
1
1
PTFDD0
PTFD0
0
0
0
0
101
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