ST10F276Z5Q3TR STMicroelectronics, ST10F276Z5Q3TR Datasheet - Page 25
ST10F276Z5Q3TR
Manufacturer Part Number
ST10F276Z5Q3TR
Description
MCU 16BIT 832KBIT FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet
1.ST10F276Z5T3.pdf
(239 pages)
Specifications of ST10F276Z5Q3TR
Core Processor
ST10
Core Size
16-Bit
Speed
64MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
68K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-QFP
Processor Series
ST10F27x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
68 KB
Interface Type
CAN, I2C
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
111
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
For Use With
497-6399 - KIT DEV STARTER ST10F276Z5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST10F276Z5Q3TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
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ST10F276Z5
4
4.1
4.2
4.2.1
Internal Flash memory
Overview
The on-chip Flash is composed by two matrix modules each one containing one array
divided in two banks that can be read and modified independently one of the other: one
bank can be read while another bank is under modification.
Figure 4.
The write operations of the 4 banks are managed by an embedded Flash program/erase
controller (FPEC). The high voltages needed for program/erase operations are internally
generated.
The data bus is 32-bit wide. Due to ST10 core architecture limitation, only the first
512 Kbytes are accessed at 32-bit (internal Flash bus, see I-BUS), while the remaining
320 Kbytes are accessed at 16-bit (see X-BUS).
Functional description
Structure
The following table shows the address space reserved to the Flash module.
Table 3.
IFLASH sectors
XFLASH sectors
Registers and Flash internal reserved
area
IFLASH (Module I)
Bank 1: 128 Kbyte
Bank 0: 384 Kbyte
8 Kbyte test-Flash
program memory
program memory
Description
Flash modules structure
Flash modules absolute mapping
+
I-BUS interface
Control section
Program/erase
HV and Ref.
generator
controller
0x09 0000 to 0x0D FFFF
0x0E 0000 to 0x0E FFFF
0x00 0000 to 0x08 FFFF
Addresses
X-BUS interface
XFLASH (Module X)
Bank 3: 128 Kbyte
Bank 2: 192 Kbyte
program memory
program memory
Internal Flash memory
512 Kbyte
320 Kbyte
64 Kbyte
Size
25/239
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