ST10F273M-4Q3 STMicroelectronics, ST10F273M-4Q3 Datasheet - Page 43
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ST10F273M-4Q3
Manufacturer Part Number
ST10F273M-4Q3
Description
MCU 16BIT 512K FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet
1.ST10F273M-4TR3.pdf
(182 pages)
Specifications of ST10F273M-4Q3
Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Processor Series
ST10F27x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST10F273M-4Q3
Manufacturer:
STMicroelectronics
Quantity:
10 000
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ST10F273M
5.5.8
5.5.9
Flash non-volatile access protection register 1 high (FNVAPR1H)
FNVAPR1H (0x0E DFBE)
Table 24.
Access protection
The IFlash module has one level of access protection (access to data both in Reading and
Writing): If bit ACCP of FNVAPR0 is programmed at 0, the IFlash module becomes access
protected, meaning data in the IFlash module can be read only if the current execution is
from the IFlash module itself.
Protection can be permanently disabled by programming bit PDS0 of FNVAPR1H (user
operation before returning parts to STMicroelectronics for analysis). Protection can be
permanently enabled again by programming bit PEN0 of FNVAPR1L. The action to disable
and enable again Access Protections in a permanent way can be executed a maximum of
16 times.
Trying to write into the access protected Flash from internal RAM or external memories will
be unsuccessful. Trying to read into the access protected Flash from internal RAM or
external memories will output a dummy data (software trap 009Bh).
When the Flash module is protected in access, data access through PEC of a peripheral is
also forbidden. To read/write data in PEC mode from/to a protected Bank, it is necessary to
first temporarily unprotect the Flash module.
The following table summarizes all possible Access Protection levels: In particular, it shows
what is possible and not possible to do when fetching from a memory (see fetch location
column) supposing all possible access protections are enabled.
Table 25.
PEN1
Fetching from IFlash
Fetching from IRAM
15:0
RW
Bit
15
5
Fetch location
PEN1
RW
14
PEN15
4
Name
PEN0
...
PEN1
RW
FNVAPR1H register bits
Summary of access protection level
13
3
Protections enable 15-0
PEN1
RW
If bit PENx is programmed at 0 and bit PDSx+1 is erased at 1, the action of bit
ACCP is enabled again. Bit PENx can be programmed at 0 only if bit PDSx has
already been programmed at 0.
12
2
PEN1
Jump to IFlash
RW
11
Read IFlash /
1
Yes / Yes
No / Yes
PEN1
RW
10
0
PEN
RW
9
9
PEN
RW
external memory /
Jump to XRAM or
external memory
8
8
Read XRAM or
Yes / Yes
Yes / Yes
NVR
PEN
RW
7
7
Function
PEN
RW
6
6
PEN
RW
5
5
Read Flash
registers
PEN
RW
4
4
Yes
Yes
Internal Flash memory
PEN
RW
3
3
Delivery value: FFFFh
PEN
RW
2
2
Write Flash
registers
PEN
RW
Yes
No
1
1
43/182
PEN
RW
0
0
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