ST72F561K9T3 STMicroelectronics, ST72F561K9T3 Datasheet - Page 201

• Manufacturer Part Number: ST72F561K9T3
• Description: IC MCU 8BIT 60K FLASH 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F561K9T3

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LINSCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-LQFP
• Processor Series: ST72F5x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• For Use With: 497-8374 - BOARD DEVELOPMENT FOR ST72F561
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

beCAN CONTROLLER (Cont’d)
MAILBOX DATA LENGTH CONTROL REGIS-
TER (MDLC)
All bits of this register is write protected when the
mailbox is not in empty state.
Read / Write
Reset Value: xxxx xxxx (xxh)
Bit 7 = Reserved, must be kept cleared.
Bits 6:4 = Reserved, forced to 0 by hardware.
Bits 3:0 = DLC[3:0] Data Length Code
This field defines the number of data bytes a data
frame contains or a remote frame request.
7
0
0
0
0
DLC3
DLC2
DLC1
DLC0
0
MAILBOX DATA REGISTERS (MDAR[7:0])
All bits of this register are write protected when the
mailbox is not in empty state.
Read / Write
Reset Value: Undefined
Bits 7:0 = DATA[7:0] Data
A data byte of the message. A message can con-
tain from 0 to 8 data bytes.
DATA7
7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
ST72561
201/265
DATA0
0