ST7FLITE35F2M6 STMicroelectronics, ST7FLITE35F2M6 Datasheet - Page 174
![IC MCU 8BIT 8K FLASH 20SOIC](/photos/6/56/65691/497-20-soic__7_5mm_width__series_sml.jpg)
ST7FLITE35F2M6
Manufacturer Part Number
ST7FLITE35F2M6
Description
IC MCU 8BIT 8K FLASH 20SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Specifications of ST7FLITE35F2M6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
ST7FLITE3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
LINSCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 7 Channel
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5085 - EVAL BOARD UNIV MOTOR CONTROL497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FLITE35F2M6TR
Manufacturer:
ST
Quantity:
20 000
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Function Descriptions
Table 118. LART_ConfigurePWM
174/235
Function Name
Function Prototype
Behaviour Description
Input Parameter 1
Input Parameter 2
Input Parameter 3
Input Parameter 4
Output Parameters
Required Preconditions
Functions called
LART_ConfigurePWM
Void LART_ConfigurePWM (Lart_PWMChannel PWM-
Channel, unsigned int Autoreload_Value,
Lart_Output POLARITY,unsigned int Dutycycle_Data)
Generates PWM on PWMx pin. The PWM signal frequen-
cy is controlled by counter clock period and ATR register
value (Input parameter 1). The PWM signal duty cycle de-
pends upon input parameter 2 and input parameter 4.
PWMChannel
LART_PWM0
PWM channel 0 is configured
LART_PWM1
PWM channel 1 is configured
LART_PWM2
PWM channel 2 is configued
LART_PWM3
PWM channel 3 is configured
Autoreload_Value
This value is loaded in autoreload register (ATR). You can
select this value from 0x000 to 0xFFF depending on the
frequency required for the PWM signal.
LART_POLARITY_0
PWM output level is low, for Counter value >
Dutycycle_Data,
PWM output level is high, for Counter value <=
Dutycycle_Data.
LART_POLARITY_1
PWM output level is high, for Counter value >
Dutycycle_Data,
PWM output level is low, for Counter value <=
Dutycycle_Data.
Dutycycle_Data
Data to be loaded in Duty cycle register (0x000 to 0xFFF).
Note: This value must be greater than the ATR register
value loaded through Input parameter 1 to obtain signal on
PWMx pin.
None
LART_Init must have been called to select the counter
clock.
None
1)
1)
1)
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