ST7FLITE39F2M3TR STMicroelectronics, ST7FLITE39F2M3TR Datasheet - Page 11

• Manufacturer Part Number: ST7FLITE39F2M3TR
• Description: IC MCU 8BIT 8K FLASH 20SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE39F2M3TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: LINSCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SOIC (7.5mm Width)
• For Use With: 497-8406 - BOARD STF20NM50FD/STF7LITE39BF2497-8403 - BOARD DEMO STCC08 AC SW DETECTOR497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Legend: x=undefined, R/W=read/write
Notes:
1. The contents of the I/O port DR registers are readable only in output configuration. In input configura-
tion, the values of the I/O pins are returned instead of the DR register contents.
2. The bits associated with unavailable pins must always keep their reset value.
3. For a description of the DM registers, see the ST7 ICC Reference Manual.
Address
003Dh to
0051h to
003Ch
004Ch
004Dh
003Ah
003Bh
003Fh
004Ah
004Bh
004Eh
004Fh
007Fh
0031h
0032h
0033h
0034h
0035h
0036h
0037h
0038h
0039h
0040h
0041h
0042h
0043h
0044h
0045h
0046h
0047h
0049h
0050h
0048h
Clock and
(LIN Mas-
ter/Slave)
LINSCI
Block
Reset
AWU
MCC
DM
ADC
SPI
ITC
ITC
3)
EISR
SPIDR
SPICR
SPICSR
ADCCSR
ADCDRH
ADCDRL
EICR
MCCSR
RCCR
SICSR
SCISR
SCIDR
SCIBRR
SCICR1
SCICR2
SCICR3
SCIERPR
SCIETPR
AWUPR
AWUCSR
DMCR
DMSR
DMBK1H
DMBK1L
DMBK2H
DMBK2L
Register
Label
SPI Data I/O Register
SPI Control Register
SPI Control Status Register
A/D Control Status Register
A/D Data Register High
A/D control and Data Register Low
External Interrupt Control Register
Main Clock Control/Status Register
RC oscillator Control Register
System Integrity Control/Status Register
External Interrupt Selection Register
SCI Status Register
SCI Data Register
SCI Baud Rate Register
SCI Control Register 1
SCI Control Register 2
SCI Control Register 3
SCI Extended Receive Prescaler Register
SCI Extended Transmit Prescaler Register
AWU Prescaler Register
AWU Control/Status Register
DM Control Register
DM Status Register
DM Breakpoint Register 1 High
DM Breakpoint Register 1 Low
DM Breakpoint Register 2 High
DM Breakpoint Register 2 Low
Reserved area (47 bytes)
Reserved area (3 bytes)
Reserved area (1 byte)
Reserved area (1 byte)
Register Name
Reset Status
0110 0xx0b
00xx xxxxb
FFh
C0h
FFh
0xh
00h
00h
x0h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
xxh
xxh
xxh
xxh
ST7LITE3xF2
R/W
R/W
R/W
R/W
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Remarks
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