Z8F082AHH020SG2156 Zilog, Z8F082AHH020SG2156 Datasheet - Page 145

• Manufacturer Part Number: Z8F082AHH020SG2156
• Description: IC ENCORE XP MCU FLASH 8K
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F082AHH020SG2156

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: Q5278375

LDWX
Load Word using Extended Addressing
LDWX dst, src
UM012811-0904
Mnemonic Destination, Source
LDWX
Operation
Description
Flags
Attributes
Escaped Mode Addressing
ER1, ER2
dst
Two bytes from the source operand are loaded into the destination operand. The contents
of the source operand are unaffected. The destination and source addresses need to be on
even boundaries (i.e. bit 0 of the address must be zero).
Address mode ER for the source or destination can specify a Working Register with 4-bit
addressing.
If the high byte of the source or destination address is
ter is inferred. For example, the operand
bit address is given by {RP[3:0], RP[7:4], 2H}.
To access Registers on Page EH (addresses
to
C
Z
S
V
D
H
EH
←
and set the Working Group Pointer, RP[7:4], to the desired Working Group.
src
Unaffected.
Unaffected.
Unaffected.
Unaffected.
Unaffected.
Unaffected.
Opcode (Hex)
1F E8
ER2[11:4]
Operand 1
EE2H
E00H
selects Working Register R2. The full 12-
Operand 2
{ER2[3:0], ER1[11:8]} ER1 [7:0]
to
EFFH
eZ8 CPU Instruction Set Description
EEH
), set the Page Pointer, RP[3:0],
(11101110B), a Working Regis-
Operand 3
User Manual
eZ8 CPU
135