Z8F082AHH020SG2156 Zilog, Z8F082AHH020SG2156 Datasheet - Page 113

• Manufacturer Part Number: Z8F082AHH020SG2156
• Description: IC ENCORE XP MCU FLASH 8K
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F082AHH020SG2156

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: Q5278375

DECW
Decrement Word
DECW dst
UM012811-0904
Mnemonic
DECW
DECW
Operation
Description
Flags
Attributes
Escaped Mode Addressing
dst
The 16-bit value indicated by the destination operand is decremented by one. Only even
addresses can be used for the register pair. For indirect addressing, the indirect address can
be any value, but the effective address can only be an even address.
Using Escaped Mode Addressing, address modes RR can specify a Working Register Pair
or IR can specify a Working Register. If the high nibble of the source or destination
address is EH (1110B), a Working Register (or Pair) is inferred. For example, if Working
Register Pair R12 and R13 (with base address CH) is the desired destination operand, use
ECH as the destination operand in the opcode. To access Register Pairs with addresses
E0H to EFH, either set the Working Group Pointer, RP[7:4], to EH or use indirect address-
ing.
C
Z
S
V
D
H
Destination
RR1
@R1
←
dst - 1
Unaffected.
Set if the result is zero; reset otherwise.
Set if Bit 7 of the result is set; reset otherwise.
Set if an arithmetic overflow occurs; reset otherwise.
Unaffected.
Unaffected.
Opcode (Hex)
80
81
Operand 1
RR1
R1
eZ8 CPU Instruction Set Description
Operand 2
—
—
Operand 3
—
—
User Manual
eZ8 CPU
103