STM8S103F3U6TR STMicroelectronics, STM8S103F3U6TR Datasheet - Page 83
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STM8S103F3U6TR
Manufacturer Part Number
STM8S103F3U6TR
Description
MCU 8BIT 8KB FLASH 20-UFQFPN
Manufacturer
STMicroelectronics
Series
STM8Sr
Datasheet
1.STM8S103F2P6TR.pdf
(113 pages)
Specifications of STM8S103F3U6TR
Core Processor
STM8
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
640 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.95 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-VFQFN, 20-VFQFPN
Processor Series
STM8S10x
Core
STM8
3rd Party Development Tools
EWSTM8
Development Tools By Supplier
STM8/128-MCKIT, STM8S-DISCOVERY, ST-LINK, STICE-SYS001, STX-RLINK
For Use With
497-10593 - KIT STARTER FOR STM8S207/8 SER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM8S103F3U6TR
Manufacturer:
MAXIM
Quantity:
1 400
Company:
Part Number:
STM8S103F3U6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
STM8S103K3 STM8S103F3 STM8S103F2
10.3.10
Symbol
t
t
C
(1)
(2)
(3)
low time
(4)
the undefined region of the falling edge of SCL
w(STO:ST A)
su(STO)
b
The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge
f
Data based on standard I
The maximum hold time of the start condition has only to be met if the interface does not stretch the
MASTER
Parameter
STOP condition setup time
STOP to START condition time
(bus free)
Capacitive load for each bus line
, must be at least 8 MHz to achieve max fast I
1. Measurement points are made at CMOS levels: 0.3 x VDD and 0.7 x VDD.
10-bit ADC characteristics
Subject to general operating conditions for V
Figure 42: Typical application with I
SDA
SCL
I
2
t
C bus
f(SDA)
2
C protocol requirement, not tested in production
t
h(STA)
START
4.7k
t
w(SCLH)
t
r(SDA)
V DD
t
w(SCLL)
4.7k
DocID15441 Rev 6
V DD
t
su(SDA)
Standard mode I
Min
t
r(SCL)
4.0
4.7
100
100
(2)
t
h(SDA)
t
f(SCL)
2
SDA
SCL
DD
C speed (400kHz)
, f
MASTER
STM8S
2
C bus and timing diagram
2
C
Max
, and T
400
(2)
t
su(STA)
A
t
su(STO)
Fast mode I
Min
unless otherwise specified.
Electrical characteristics
0.6
1.3
t
STOP
w(STO:STA)
(2)
REPEATED
START
Max
ai17490
400
START
2
C
(2)
(1)
Unit
μs
pF
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