STM8S103F3U6TR STMicroelectronics, STM8S103F3U6TR Datasheet - Page 33
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STM8S103F3U6TR
Manufacturer Part Number
STM8S103F3U6TR
Description
MCU 8BIT 8KB FLASH 20-UFQFPN
Manufacturer
STMicroelectronics
Series
STM8Sr
Datasheet
1.STM8S103F2P6TR.pdf
(113 pages)
Specifications of STM8S103F3U6TR
Core Processor
STM8
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
640 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.95 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-VFQFN, 20-VFQFPN
Processor Series
STM8S10x
Core
STM8
3rd Party Development Tools
EWSTM8
Development Tools By Supplier
STM8/128-MCKIT, STM8S-DISCOVERY, ST-LINK, STICE-SYS001, STX-RLINK
For Use With
497-10593 - KIT STARTER FOR STM8S207/8 SER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM8S103F3U6TR
Manufacturer:
MAXIM
Quantity:
1 400
Company:
Part Number:
STM8S103F3U6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
STM8S103K3 STM8S103F3 STM8S103F2
Address
0x00 523B to
0x00 523F
0x00 5250
0x00 5251
0x00 5252
0x00 5253
0x00 5254
0x00 5255
0x00 5256
0x00 5257
0x00 5258
0x00 5259
0x00 525A
0x00 525B
0x00 525C
0x00 525D
0x00 525E
Block
Reserved area (21 bytes)
TIM1
Register label
TIM1_CR1
TIM1_CR2
TIM1_SMCR
TIM1_ETR
TIM1_IER
TIM1_SR1
TIM1_SR2
TIM1_EGR
TIM1_CCMR1
TIM1_CCMR2
TIM1_CCMR3
TIM1_CCMR4
TIM1_CCER1
TIM1_CCER2
TIM1_CNTRH
DocID15441 Rev 6
Register name
TIM1 control register 1
TIM1 control register 2
TIM1 slave mode control register
TIM1 external trigger register
TIM1 interrupt enable register
TIM1 status register 1
TIM1 status register 2
TIM1 event generation register
TIM1 capture/compare mode register
1
TIM1 capture/compare mode register
2
TIM1 capture/compare mode register
3
TIM1 capture/compare mode register
4
TIM1 capture/compare enable
register 1
TIM1 capture/compare enable
register 2
TIM1 counter high
Memory and register map
Reset
status
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
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