P80C592FFA/00,512 NXP Semiconductors, P80C592FFA/00,512 Datasheet - Page 57

• Manufacturer Part Number: P80C592FFA/00,512
• Description: IC 80C51 MCU 8BIT ROMLESS 68PLCC
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C592FFA/00,512

• Program Memory Type: ROMless
• Package / Case: 68-PLCC
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 48
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P80C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: CAN/UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Cpu Family: 80C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 512Byte
• # I/os (max): 40
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1241-5; 935086530512; P80C592FFAA

Philips Semiconductors
13.6.3
A CAN-controller acting as a receiver for certain
information may initiate the transmission of the respective
data by transmitting a Remote Frame to the network,
addressing the data source via the Identifier and setting
the RTR bit HIGH (remote; recessive bus level). The
Remote Frame is similar to the Data Frame with the
following exceptions:
Note that the value of the Data Length Code should be the
one of the corresponding Data Frame, although it is
ignored for a Remote Frame.
A Remote Frame is composed of six different bit fields:
See Section 13.6.2 for more detailed explanation of the
Remote Frame bit fields.
13.6.4
The Error Frame consists of two different fields:
13.6.4.1
There are two forms of an Error Flag:
An error-active CAN-controller (see Section 13.6.9)
detecting an error condition signals this by transmission of
an Active Error Flag. This Error Flag's form violates the
bit-stuffing rule (see Section 13.6.7) applied to all fields,
1996 Jun 27
RTR bit is set HIGH
Data Length Code is ignored
No Data Field contained.
Start-of-Frame
Arbitration Field
Control Field
CRC Field
Acknowledge Field
End-Of-Frame.
The first field, accomplished by the superimposing of
Error Flags contributed from different CAN-controllers
The second field is the Error Delimiter.
Active Error Flag, consists of six consecutive
dominant bits.
Passive Error Flag, consists of six consecutive
recessive bits unless it is overwritten by dominant bits
from other CAN-controllers.
8-bit microcontroller with on-chip CAN
R
E
RROR
EMOTE
Error Flag
F
F
RAME
RAME
57
from Start-Of-Frame to CRC Delimiter, or destroys the
fixed form of the fields Acknowledge Field or
End-Of-Frame (see Fig.20).
Consequently, all other CAN-controllers detect an error
condition and start transmission of an Error Flag.
Therefore the sequence of dominant bits, which can be
monitored on the bus, results from a superposition of
different Error Flags transmitted by individual
CAN-controllers. The total length of this sequence varies
between six (minimum) and twelve (maximum) bits.
An error-passive CAN-controller (see Section 13.6.9)
detecting an error condition tries to signal this by
transmission of a Passive Error Flag. The error-passive
CAN-controller waits for six consecutive bits with identical
polarity, beginning at the start of the Passive Error Flag.
The Passive Error Flag is complete when these six
identical bits have been detected.
13.6.4.2
The Error Delimiter consists of eight recessive bits and has
the same format as the Overload Delimiter. After
transmission of an Error Flag, each CAN-controller
monitors the bus-line until it detects a transition from a
dominant-to-recessive bit level. At this point in time, every
CAN-controller has finished sending its Error Flag and has
additionally sent the first out of the 8 recessive bits of the
Error Delimiter. Afterwards all CAN-controllers transmit the
remaining recessive bits. After this event and an
Intermission Field all error-active CAN-controllers within
the network can start a transmission simultaneously.
If a detected error is signalled during transmission of a
Data Frame or Remote Frame, the current message is
spoiled and a retransmission of the message is initiated.
If a CAN-controller monitors any deviation of the Error
Frame, a new Error Frame will be transmitted. Several
consecutive Error Frames may result in the CAN-controller
becoming error-passive and leaving the network
unblocked.
In order to terminate an Error Flag correctly, an
error-passive CAN-controller requires the bus to be
Bus-Idle (see Section 13.6.6) for at least three bit periods
(if there is a local error at an error-passive-receiver).
Therefore a CAN-bus should not be 100% permanently
loaded.
Error Delimiter
Product specification
P8xC592