P80C592FFA/00,512 NXP Semiconductors, P80C592FFA/00,512 Datasheet - Page 11

• Manufacturer Part Number: P80C592FFA/00,512
• Description: IC 80C51 MCU 8BIT ROMLESS 68PLCC
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C592FFA/00,512

• Program Memory Type: ROMless
• Package / Case: 68-PLCC
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 48
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P80C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: CAN/UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Cpu Family: 80C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 512Byte
• # I/os (max): 40
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1241-5; 935086530512; P80C592FFAA

Philips Semiconductors
7.1
The Program Memory of the P8xC592 consists of 16 kbytes ROM on-chip, externally expandible up to 64 kbytes.
Table 3 Instruction fetch controlled by EA
Notes
1. This implementation prevents reading of the internal program code by switching from external Program Memory
2. By setting a security bit the internal Program Memory content is protected, which means it cannot be read out.
7.2
The internal Data Memory is physically built-up and accessible as shown in Table 4 (see Fig.5).
Table 4 Internal Data Memory size and address mode
Notes
1. MAIN RAM can be addressed directly and indirectly as in the 80C51.
2. AUXILIARY RAM (0 to 255):
3. SFRs = Special Function Registers.
1996 Jun 27
MAIN RAM
(note 1)
AUXILIARY RAM
(note 2)
SFRs (note 3)
DURING RESET
DATA MEMORY
8-bit microcontroller with on-chip CAN
LATCHED TO:
during a MOVC instruction.
If the security bit has been set to LOW there are no restrictions for the MOVC instruction.
a) Is indirectly addressable in the same way as the external Data Memory with MOVX instructions.
b) Access will not affect the ports P0, P2, P3.6 and P3.7 during internal program execution.
INTERNAL
Program Memory
Internal Data Memory
H
H
L
PIN EA (note 1)
256 bytes
256 bytes
128 bytes
AFTER RESET
‘don’t care’
SIZE
0 to 127
128 to 255
0 to 255
128 to 255
LOCATION
internal Program Memory (note 2)
external Program Memory
INSTRUCTIONS FETCHED FROM:
DIRECT
ADDRESS MODE
X
X
11
INDIRECT
X
X
X
address pointers are R0 and R1 of the
selected register bank
address pointers are R0 and R1 of the
selected register bank and the DPTR
POINTERS
0000H
4000H
0000H
Product specification
LOCATION
ADDRESS
P8xC592
3FFFH
FFFFH
FFFFH