LPC3180FEL320 NXP Semiconductors, LPC3180FEL320 Datasheet - Page 22

• Manufacturer Part Number: LPC3180FEL320
• Description: IC ARM9 MCU 208MHZ 320-LFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC3000r

Specifications of LPC3180FEL320

• Core Size: 16/32-Bit
• Oscillator Type: External
• Core Processor: ARM9
• Speed: 208MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, UART/USART, USB OTG
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 55
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.3 V
• Data Converters: A/D 3x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 320-LFBGA
• No. Of I/o's: 55
• Ram Memory Size: 64KB
• Cpu Speed: 208MHz
• No. Of Timers: 1
• No. Of Pwm Channels: 2
• Digital Ic Case Style: LFBGA
• Supply Voltage Range: 1.7V
• Controller Family/series: LPC31xx
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1018 - EVAL KIT FOR LP3180568-4063 - KIT DEV LPC3180568-4062 - DEBUGGER J-LINK JTAG568-4061 - DEBUGGER U-LINK2 JTAG FOR NXP
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3242

NXP Semiconductors
LPC3180_2
Preliminary data sheet
6.16.1 Features
6.17.1 Features
6.18.1 Features
6.16 SD card controller
6.17 Keyboard scan
6.18 High-speed timer
The SD interface allows access to external SD memory cards. The SD card interface
conforms to the SD Memory Card Specification Version 1.01.
The keyboard scan function can automatically scan a keyboard of up to 64 keys in an
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in an idle state, with all KEY_ROW[n] pins set high, waiting for a change in the column
inputs to indicate that one or more keys have been pressed.
When a keypress is detected, the matrix is scanned by setting one output pin high at a
time and reading the column inputs. After de-bouncing, the keypad state is stored and an
interrupt is generated. The keypad is then continuously scanned waiting for ‘extra key
pressed’ or ‘key released’. Any new keypad state is scanned and stored into the matrix
registers followed by a new interrupt request to the interrupt controller. It is possible to
detect and separate up to 64 multiple keys pressed.
The high-speed timer block is clocked by the main peripheral clock. The clock is first
divided down in a 16-bit programmable prescale counter which clocks a 32-bit
Timer/Counter.
The high-speed timer includes three match registers that are compared to the
Timer/Counter value. A match can generate an interrupt and cause the Timer/Counter to
either continue to run, stop, or be reset. The high-speed timer also includes two capture
registers that can take a snapshot of the Timer/Counter value when an input signal
transitions. A capture event may also generate an interrupt.
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8 matrix. In operation, the keyboard scanner’s internal state machine will normally be
Busy input function.
DMA time out interrupt to allow detection of end of reception when using DMA.
Timed interrupt to facilitate emptying the FIFO at the end of a transmission.
SPI clock and data pins may be used as general purpose pins if the SPI is not used.
Conformance to the SD Memory Card Specification Version 1.01.
DMA is supported through the system DMA controller.
Provides all functions specific to the SD memory card. These include the clock
generation unit, power management control, command and data transfer.
Supports up to 64 keys in 8
Programmable debounce period.
A key press can wake up the CPU from Stop mode.
32-bit Timer/Counter with programmable 16-bit prescaler.
Rev. 02 — 15 February 2007
16/32-bit ARM microcontroller with external memory interface
8 matrix.
LPC3180
© NXP B.V. 2007. All rights reserved.
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