LPC3143FET180,551 NXP Semiconductors, LPC3143FET180,551 Datasheet - Page 65

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LPC3143FET180,551

Manufacturer Part Number
LPC3143FET180,551
Description
IC ARM9 MCU USB OTG 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC3000r
Datasheet

Specifications of LPC3143FET180,551

Package / Case
180-TFBGA
Voltage - Supply (vcc/vdd)
1.1 V ~ 1.3 V
Operating Temperature
-40°C ~ 85°C
Speed
270MHz
Number Of I /o
20
Core Processor
ARM9
Program Memory Type
External Program Memory
Ram Size
192K x 8
Data Converters
A/D 4x10b
Oscillator Type
External
Peripherals
DMA, I²S, LCD, PWM, WDT
Connectivity
EBI/EMI, I²C, IrDA, MMC, PCM, SPI, UART/USART, USB OTG
Core Size
32-Bit
Processor Series
LPC31
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
192 KB
Interface Type
I2C, I2S, SPI, JTAG, UART, USB
Maximum Clock Frequency
270 MHz
Number Of Timers
5
Operating Supply Voltage
1.2 V, 1.8 V, 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC3143FET180,551
Manufacturer:
AD
Quantity:
2 872
Part Number:
LPC3143FET180,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 26.
C
[1]
Table 27:
LPC3141_3143
Preliminary data sheet
Symbol
t
t
t
V
t
t
t
t
t
t
Symbol
f
t
r
f
FRFM
FEOPT
FDEOP
JR1
JR2
EOPR1
EOPR2
s
conv
Fig 28. Differential data-to-EOP transition skew and EOP width
L
CRS
= 50 pF; R
Characterized but not implemented as production test. Guaranteed by design.
t
PERIOD
differential
data lines
Dynamic characteristics: USB pins (high-speed)
Dynamic characteristics: 10-bit ADC
pu
= 1.5 k
9.10 10-bit ADC
9.9 USB interface
Parameter
rise time
fall time
differential rise and fall time
matching
output signal crossover voltage
source SE0 interval of EOP
source jitter for differential transition
to SE0 transition
receiver jitter to next transition
receiver jitter for paired transitions
EOP width at receiver
EOP width at receiver
Parameter
sampling frequency
conversion time
Ω
on D+ to V
n × t
differential data to
crossover point
DD(IO)
SE0/EOP skew
PERIOD
(SUP3), unless otherwise specified.
All information provided in this document is subject to legal disclaimers.
+ t
FDEOP
Conditions
10 bit resolution
2 bit resolution
10 bit resolution
2 bit resolution
Rev. 0.16 — 27 May 2010
10 % to 90 %
Conditions
10 % to 90 %
10 % to 90 %
see
see
must reject as
EOP; see
Figure 28
must accept as
EOP; see
Figure 28
t
r
/ t
Figure 28
Figure 28
f
Min
400
-
-
3
crossover point
extended
Typ
-
-
-
-
[1]
[1]
Min
<tbd>
<tbd>
-
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
Max
-
1500
11
-
LPC3141/3143
source EOP width: t
receiver EOP width: t
Typ
-
-
-
-
-
-
-
-
-
-
Unit
kSamples/s
kSamples/s
clock cycles
clock cycles
© NXP B.V. 2010. All rights reserved.
Max
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
-
-
FEOPT
002aab561
EOPR1
, t
EOPR2
65 of 74
Unit
ns
ns
%
V
ns
ns
ns
ns
ns
ns

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