AT91SAM7X512-AU Atmel, AT91SAM7X512-AU Datasheet - Page 116

MCU ARM 512K HS FLASH 100-LQFP

AT91SAM7X512-AU

Manufacturer Part Number
AT91SAM7X512-AU
Description
MCU ARM 512K HS FLASH 100-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7X512-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
CAN, SPI, SSC, TWI, USART, USB
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
No. Of I/o's
62
Ram Memory Size
128KB
Cpu Speed
55MHz
No. Of Timers
3
No. Of Pwm Channels
4
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7X-EK - KIT EVAL FOR AT91SAM7X256/128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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19.3.2
Register Name:
Access Type:
Offset: (EFC0)
Offset: (EFC1)
• FCMD: Flash Command
This field defines the Flash commands:
116
31
23
15
7
AT91SAM7X512/256/128 Preliminary
MC Flash Command Register
Others
FCMD
0000
0001
0010
0011
0100
1000
1011
1101
1111
30
22
14
MC_FCR
Write-only
0x64
0x74
6
Operations
No command.
Does not raise the Programming Error Status flag in the Flash Status Register MC_FSR.
Write Page Command (WP):
Starts the programming of the page specified in the PAGEN field.
Set Lock Bit Command (SLB):
Starts a set lock bit sequence of the lock region specified in the PAGEN field.
Write Page and Lock Command (WPL):
The lock sequence of the lock region associated with the page specified in the field PAGEN
occurs automatically after completion of the programming sequence.
Clear Lock Bit Command (CLB):
Starts a clear lock bit sequence of the lock region specified in the PAGEN field.
Erase All Command (EA):
Starts the erase of the entire Flash.
If at least one page is locked, the command is cancelled.
Set General-purpose NVM Bit (SGPB):
Activates the general-purpose NVM bit corresponding to the number specified in the PAGEN
field.
Clear General Purpose NVM Bit (CGPB):
Deactivates the general-purpose NVM bit corresponding to the number specified in the
PAGEN field.
Set Security Bit Command (SSB):
Sets security bit.
Reserved.
Raises the Programming Error Status flag in the Flash Status Register MC_FSR.
29
21
13
5
28
20
12
4
PAGEN
KEY
27
19
11
3
26
18
10
2
FCMD
25
17
9
1
6120H–ATARM–17-Feb-09
PAGEN
24
16
8
0

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