DSPIC30F6014-20E/PF Microchip Technology, DSPIC30F6014-20E/PF Datasheet - Page 9
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DSPIC30F6014-20E/PF
Manufacturer Part Number
DSPIC30F6014-20E/PF
Description
IC DSPIC MCU/DSP 144K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F6014-20IPF.pdf
(228 pages)
3.DSPIC30F6014-20IPF.pdf
(22 pages)
4.DSPIC30F6014-20IPF.pdf
(28 pages)
Specifications of DSPIC30F6014-20E/PF
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TQFP, 80-VQFP
For Use With
DM300024 - KIT DEMO DSPICDEM 1.1DM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC164314 - MODULE SKT FOR PM3 80PFAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F601420EPF
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6014-20E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F6014-20E/PF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
EXAMPLE 11:
FIGURE 1:
© 2008 Microchip Technology Inc.
BCLR
MOV
RRC
RRC
MOV
MOV
MOV
RRC
RRC
MOV
MOV
CSCK
COFS
Data
Note 1: The Slave mode operation shown in this figure uses the DCI module’s operation with DJST = 1, to create a
SR, #C
My1stTxDataWord, W0
W0, W0
W1, W1
W0, TXBUF0
W1, TXBUF1
My2ndTxDataWord, W0
W0, W0
W1, W1
W0, TXBUF2
W1, TXBUF3
2: Note that the actual data intended for transmission on Time Slot 0 is now straddled across two time slots –
3: Data loaded into TXBUF0 contains 15 MSbs of the actual 16-bit data to be transmitted, while the MSb of
4: Not all serial clock pulses are shown in this timing diagram.
work around for the erratum associated with the DCI module when DJST = 0.
Time Slot 0 and Time Slot 1. The MSb of Time Slot 0 is ‘0’; while the MSb of Time Slot 1 is actually the LSb
of the data intended for transmission.
TXBUF0 is cleared.
DCI SLAVE WORK AROUND
DCI SLAVE WORK AROUND
0
MSB
Data from TXBUF0
Time Slot 0
Actual Data to be transmitted
dsPIC30F6011/6012/6013/6014
Frame Synch and first data bit sampled here
LSB
+ 1
LSB
Data from TXBUF1
Time Slot 1
DS80198J-page 9