AT90USB1286-AU Atmel, AT90USB1286-AU Datasheet - Page 381
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AT90USB1286-AU
Manufacturer Part Number
AT90USB1286-AU
Description
MCU AVR 128K FLASH 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® 90USBr
Specifications of AT90USB1286-AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Controller Family/series
AVR USB
No. Of I/o's
48
Eeprom Memory Size
4KB
Ram Memory Size
8KB
Cpu Speed
20MHz
Rohs Compliant
Yes
Processor Series
AT90USBx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT90USB1286-AU
Manufacturer:
SOUTH
Quantity:
650
Part Number:
AT90USB1286-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT90USB1286-AUR
Manufacturer:
Atmel
Quantity:
747
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29.8
29.8.1
7593K–AVR–11/09
Serial Programming Pin Mapping
Serial Programming Algorithm
Table 29-14. Pin Mapping Serial Programming
Figure 29-10. Serial Programming and Verify
Notes:
When programming the EEPROM, an auto-erase cycle is built into the self-timed programming
operation (in the Serial mode ONLY) and there is no need to first execute the Chip Erase
instruction. The Chip Erase operation turns the content of every memory location in both the
Program and EEPROM arrays into 0xFF.
Depending on CKSEL Fuses, a valid clock must be present. The minimum low and high periods
for the serial clock (SCK) input are defined as follows:
Low: > 2 CPU clock cycles for f
High: > 2 CPU clock cycles for f
When writing serial data to the AT90USB64/128, data is clocked on the rising edge of SCK.
When reading data from the AT90USB64/128, data is clocked on the falling edge of SCK. See
Figure 29-11
To program and verify the AT90USB64/128 in the serial programming mode, the following
sequence is recommended (See four byte instruction formats in
Symbol
PDO
SCK
PDI
1. If the device is clocked by the internal Oscillator, it is no need to connect a clock source to the
2. V
XTAL1 pin.
CC
for timing details.
- 0.3V < AVCC < V
(TQFP-64)
Pins
PB2
PB3
PB1
PDO
SCK
PDI
ck
ck
CC
< 12 MHz, 3 CPU clock cycles for f
< 12 MHz, 3 CPU clock cycles for f
+ 0.3V, however, AVCC should always be within 1.8 - 5.5V
XTAL1
RESET
GND
I/O
O
I
I
(1)
AVCC
VCC
Serial Data out
Serial Data in
Description
Serial Clock
+1.8 - 5.5V
+1.8 - 5.5V
Table
AT90USB64/128
(2)
ck
ck
29-16):
>= 12 MHz
>= 12 MHz
381
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