AT90USB1286-AU Atmel, AT90USB1286-AU Datasheet - Page 30

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AT90USB1286-AU

Manufacturer Part Number
AT90USB1286-AU
Description
MCU AVR 128K FLASH 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheets

Specifications of AT90USB1286-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Controller Family/series
AVR USB
No. Of I/o's
48
Eeprom Memory Size
4KB
Ram Memory Size
8KB
Cpu Speed
20MHz
Rohs Compliant
Yes
Processor Series
AT90USBx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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5.5
5.5.1
5.5.2
30
External Memory Interface
AT90USB64/128
Overview
Using the External Memory Interface
With all the features the External Memory Interface provides, it is well suited to operate as an
interface to memory devices such as External SRAM and Flash, and peripherals such as LCD-
display, A/D, and D/A. The main features are:
When the eXternal MEMory (XMEM) is enabled, address space outside the internal SRAM
becomes available using the dedicated External Memory pins (see
10-3 on page
Figure 5-4.
The interface consists of:
The control bits for the External Memory Interface are located in two registers, the External
Memory Control Register A – XMCRA, and the External Memory Control Register B – XMCRB.
• AD7:0: Multiplexed low-order address bus and data bus.
• A15:8: High-order address bus (configurable number of bits).
• ALE: Address latch enable.
• RD: Read strobe.
• WR: Write strobe.
Four different wait-state settings (including no wait-state).
Independent wait-state setting for different external Memory sectors (configurable sector size).
The number of bits dedicated to address high byte is selectable.
Bus keepers on data lines to minimize current consumption (optional).
79, and
External Memory with Sector Select
Table 10-9 on page
E xternal M emory
(0-60K x 8)
M emory C onfiguration A
83). The memory configuration is shown in
I nternal memory
L ower sector
U pper sector
SRW01
SRW00
SRW11
SRW10
0 x 0000
ISRAM end
XMem start
0 x FFFF
SRL[2..0]
Figure 2-1 on page
7593K–AVR–11/09
Figure
5,
Table
5-4.

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