AT89C51ID2-SLRUM Atmel, AT89C51ID2-SLRUM Datasheet - Page 91

IC 8051 MCU 64K FLASH 44-PLCC

AT89C51ID2-SLRUM

Manufacturer Part Number
AT89C51ID2-SLRUM
Description
IC 8051 MCU 64K FLASH 44-PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51ID2-SLRUM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
UART, SPI, TWI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
AT89C51ID2-SLRUMTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51ID2-SLRUM
Manufacturer:
Atmel
Quantity:
10 000
Table 68. Status in Slave Receiver Mode
91
(SSCS)
Status
Code
60h
68h
70h
78h
80h
88h
90h
AT89C51ID2
Status of the 2-wire bus and
Arbitration lost in SLA+R/W as
master; own SLA+W has been
General call address has been
Arbitration lost in SLA+R/W as
received; NOT ACK has been
has been received; ACK has
master; general call address
own SLA+W; data has been
own SLA+W; data has been
general call; data has been
Previously addressed with
Previously addressed with
Previously addressed with
received; ACK has been
received; ACK has been
received; ACK has been
received; ACK has been
received; ACK has been
Own SLA+W has been
2-wire hardware
been returned
returned
returned
returned
returned
returned
returned
No SSDAT action or
No SSDAT action or
No SSDAT action or
No SSDAT action or
No SSDAT action or
Read data byte or
Read data byte or
Read data byte or
Read data byte or
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
To/from SSDAT
Read data byte
Read data byte
Application Software Response
STA
X
X
X
X
X
X
X
X
X
X
0
0
1
1
X
X
To SSCON
STO
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SI
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Next Action Taken By 2-wire Software
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Switched to the not addressed slave mode; no
recognition of own SLA or GCA
Switched to the not addressed slave mode; own
SLA will be recognised; GCA will be recognised if
GC=logic 1
Switched to the not addressed slave mode; no
recognition of own SLA or GCA. A START
condition will be transmitted when the bus
becomes free
Switched to the not addressed slave mode; own
SLA will be recognised; GCA will be recognised if
GC=logic 1. A START condition will be
transmitted when the bus becomes free
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
4289C–8051–11/05

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