AT89C51ID2-SLRUM Atmel, AT89C51ID2-SLRUM Datasheet - Page 127

IC 8051 MCU 64K FLASH 44-PLCC

AT89C51ID2-SLRUM

Manufacturer Part Number
AT89C51ID2-SLRUM
Description
IC 8051 MCU 64K FLASH 44-PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51ID2-SLRUM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
UART, SPI, TWI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
AT89C51ID2-SLRUMTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51ID2-SLRUM
Manufacturer:
Atmel
Quantity:
10 000
Functional Description
Software Security Bits (SSB)
Table 94. Software Security Byte Behavior
127
Manufacturer info
Bootloader info
Full chip erase
Flash/EEprom
Blank Check
BSB & SBV
Erase block
Fuse bit
SSB
AT89C51ID2
Read only access allowed
Read only access allowed
Any access allowed
Any access allowed
Any access allowed
Any access allowed
The SSB protects any Flash access from ISP command.
The command "Program Software Security bit" can only write a higher priority level.
There are three levels of security:
This is the default level.
From level 0, one can write level 1 or level 2.
For this level it is impossible to write in the Flash memory, BSB and SBV.
The Bootloader returns ’P’ on write access.
From level 1, one can write only level 2.
The level 2 forbids all read and write accesses to/from the Flash/EEPROM memory.
The Bootloader returns ’L’ on read or write access.
Only a full chip erase in parallel mode (using a programmer) or ISP command can reset
the software security bits.
From level 2, one cannot read and write anything.
Level 0
Allowed
Allowed
Allowed
level 0: NO_SECURITY (FFh)
level 1: WRITE_SECURITY (FEh )
level 2: RD_WR_SECURITY (FCh
Read only access allowed
Read only access allowed
Read only access allowed
Read only access allowed
Read only access allowed
Write level 2 allowed
Not allowed
Level 1
Allowed
Allowed
Read only access allowed
Read only access allowed
Read only access allowed
Any access not allowed
Any access not allowed
Any access not allowed
Not allowed
Level 2
Allowed
Allowed
4289C–8051–11/05

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