ATMEGA649A-AU Atmel, ATMEGA649A-AU Datasheet - Page 708

• Manufacturer Part Number: ATMEGA649A-AU
• Description: IC MCU AVR 64K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA649A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Processor Series: ATmega
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8284A–AVR–10/10
22 Analog to Digital Converter ................................................................ 219
23 LCD Controller ..................................................................................... 237
24 JTAG Interface and On-chip Debug System ..................................... 255
25 IEEE 1149.1 (JTAG) Boundary-scan ................................................... 261
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
21.3Register Description ............................................................................................217
22.1Features ..............................................................................................................219
22.2Overview .............................................................................................................219
22.3Operation .............................................................................................................220
22.4Starting a Conversion ..........................................................................................221
22.5Prescaling and Conversion Timing ......................................................................222
22.6Changing Channel or Reference Selection .........................................................224
22.7ADC Noise Canceler ...........................................................................................226
22.8ADC Conversion Result ......................................................................................230
22.9Register Description ............................................................................................232
23.1Features ..............................................................................................................237
23.2Overview .............................................................................................................237
23.3Mode of Operation ...............................................................................................240
23.4LCD Usage ..........................................................................................................244
23.5Register Description ............................................................................................248
24.1Features ..............................................................................................................255
24.2Overview .............................................................................................................255
24.3TAP – Test Access Port ......................................................................................255
24.4TAP Controller .....................................................................................................257
24.5Using the Boundary-scan Chain ..........................................................................258
24.6Using the On-chip Debug System .......................................................................258
24.7On-chip Debug Specific JTAG Instructions .........................................................259
24.8Using the JTAG Programming Capabilities .........................................................259
24.9Bibliography .........................................................................................................260
24.10Register Description ..........................................................................................260
25.1Features ..............................................................................................................261
25.2Overview .............................................................................................................261
25.3Data Registers .....................................................................................................262
25.4Boundary-scan Specific JTAG Instructions .........................................................263
25.5Boundary-scan Chain ..........................................................................................264
25.6ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P
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