ATMEGA649A-AU Atmel, ATMEGA649A-AU Datasheet - Page 242

IC MCU AVR 64K FLASH 64TQFP

ATMEGA649A-AU

Manufacturer Part Number
ATMEGA649A-AU
Description
IC MCU AVR 64K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA649A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Processor Series
ATmega
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA649A-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA649A-AUR
Manufacturer:
Atmel
Quantity:
10 000
23.3.5
23.3.6
8284A–AVR–10/10
Low Power Waveform
Operation in Sleep Mode
Figure 23-6. Driving a LCD with Four Common Terminals
To reduce toggle activity and hence power consumption a low power waveform can be selected
by writing LCDAB to one. Low power waveform requires two subsequent frames with the same
display data to obtain zero DC voltage. Consequently data latching and Interrupt Flag is only set
every second frame. Default and low power waveform is shown in
1/3 bias. For other selections of duty and bias, the effect is similar.
Figure 23-7. Default and Low Power Waveform
When synchronous LCD clock is selected (LCDCS = 0) the LCD display will operate in Idle
mode and Power-save mode with any clock source.
An asynchronous clock from TOSC1 can be selected as LCD clock by writing the LCDCS bit to
one when Calibrated Internal RC Oscillator is selected as system clock source. The LCD will
then operate in Idle mode, ADC Noise Reduction mode and Power-save mode.
When EXCLK in ASSR Register is written to one, and asynchronous clock is selected, the exter-
nal clock input buffer is enabled and an external clock can be input on Timer Oscillator 1
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
-
-
-
-
2
1
2
1
2
1
1
2
2
1
2
1
2
1
1
2
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
3
3
3
3
3
3
3
3
-V
3
3
3
3
3
3
3
3
-V
V
V
V
V
V
V
V
V
V
V
V
GND
GND
GND
V
V
V
GND
V
V
V
GND
V
V
V
GND
V
V
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
Frame
Frame
Frame
Frame
SEG0
COM0
SEG0 - COM0
SEG0
COM0
SEG0 - COM0
-
-
-
-
2
1
2
1
2
1
1
2
2
1
2
1
2
1
1
2
/
/
/
/
/
/
/
/
3
3
3
3
3
3
3
3
/
/
/
/
/
/
/
/
-V
3
3
3
3
3
3
3
3
V
V
V
V
V
V
V
V
V
V
V
-V
GND
GND
GND
V
V
V
GND
V
V
V
GND
V
V
V
GND
V
V
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
Frame
Frame
Figure 23-7
Frame
Frame
SEG0
COM0
SEG0 - COM0
for 1/3 duty and
SEG0
COM1
SEG0 - COM1
242

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