PIC14000T-04/SO Microchip Technology, PIC14000T-04/SO Datasheet - Page 44
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PIC14000T-04/SO
Manufacturer Part Number
PIC14000T-04/SO
Description
IC MCU OTP 4KX14 A/D 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 14r
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC14000-04SO.pdf
(153 pages)
4.PIC14000-04SO.pdf
(5 pages)
Specifications of PIC14000T-04/SO
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C
Peripherals
POR, Temp Sensor, WDT
Number Of I /o
20
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
Slope A/D
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC14000
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
1
Operating Supply Voltage
2.7 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
On-chip Adc
14 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC14000T-04/SO
Manufacturer:
MICROCHIP
Quantity:
12 000
PIC14000
TABLE 7-1:
FIGURE 7-4:
FIGURE 7-5:
DS40122B-page 44
Term
Transmitter
Receiver
Master
Slave
Multi-master
Arbitration
Synchronization
ACK
S
R/W
S 1
S
R/W
ACK
1 1 1 0 A9 A8 RW ACK A7 A6 A5 A4 A3 A2 A1 A0 ACK
-
-
-
Start Condition
Acknowledge
Read/Write pulse
S
Start Condition
Read/Write Pulse
Acknowledge
MSb
I
I
FORMAT
I
2
2
2
slave address
C 7-BIT ADDRESS FORMAT
C 10-BIT ADDRESS
C BUS TERMINOLOGY
Description
The device that sends the data to the bus.
The device that receives the data from the bus.
The device which initiates the transfer, generates the clock, and terminates the transfer.
The device addressed by a master.
More than one master device in a system. These masters can attempt to control the bus
at the same time without corrupting the message.
Procedure that ensures that only one of the master devices will control the bus. This
ensures that the transfer data does not get corrupted.
Procedure where the clock signals of two or more devices are synchronized.
sent by slave
= 0 for write
LSb
R/W ACK
Sent by
Slave
Preliminary
7.2
There are two address formats. The simplest is the
7-bit address format with a R/W bit (Figure 7-4). The
address is the most significant seven bits of the byte.
For example when loading the I
least significant bit is a “don’t care”. The more complex
is the 10-bit address with a R/W bit (Figure 7-5). For
10-bit address format, two bytes must be transmitted
with the first five bits specifying this to be a 10-bit
address.
Addressing I
2
C Devices
1996 Microchip Technology Inc.
2
CADD register, the