PIC14000T-04/SO Microchip Technology, PIC14000T-04/SO Datasheet - Page 19
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PIC14000T-04/SO
Manufacturer Part Number
PIC14000T-04/SO
Description
IC MCU OTP 4KX14 A/D 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 14r
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC14000-04SO.pdf
(153 pages)
4.PIC14000-04SO.pdf
(5 pages)
Specifications of PIC14000T-04/SO
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C
Peripherals
POR, Temp Sensor, WDT
Number Of I /o
20
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
Slope A/D
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC14000
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
1
Operating Supply Voltage
2.7 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
On-chip Adc
14 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC14000T-04/SO
Manufacturer:
MICROCHIP
Quantity:
12 000
4.2.2.3
The INTCON Register is a readable and writable
register which contains the various enable and flag bits
for the Timer0 overflow and peripheral interrupts.
Figure 4-5 shows the bits for the INTCON register.
FIGURE 4-5:
1996 Microchip Technology Inc.
bit7
GIE
R/W
INTCON REGISTER
PEIE
R/W
INTCON REGISTER
T0IE
R/W
R/W
r
R/W
r
T0IF
R/W
R/W
r
R/W
Preliminary
r
bit0
T0IF: TMR0 overflow interrupt flag
1 = The TMR0 has overflowed
0 = TMR0 did not overflow
T0IE: TMR0 interrupt enable bit
1 = Enables T0IF interrupt
0 = Disables T0IF interrupt
PEIE: Peripheral interrupt enable bit
1 = Enables all un-masked peripheral interrupts
0 = Disables all peripheral interrupts
GIE: Global interrupt enable
1 = Enables all un-masked interrupts
0 = Disables all interrupts
Reserved. This bit should be programmed as ‘0’. Use of this bit
as a general purpose read/write bit is not recommended, since
this may affect upward compatibility with future products.
Reserved. This bit should be programmed as ‘0’. Use of this bit
as a general purpose read/write bit is not recommended, since
this may affect upward compatibility with future products.
Reserved. This bit should be programmed as ‘0’. Use of this bit
as a general purpose read/write bit is not recommended, since
this may affect upward compatibility with future products.
Reserved. This bit should be programmed as ‘0’. Use of this bit
as a general purpose read/write bit is not recommended, since
this may affect upward compatibility with future products.
Register:
Address:
POR value: 0000 000xb
Must be cleared by software
Note:
0Bh or 8Bh
INTCON
The T0IF will be set by the specified
condition even if the corresponding Inter-
rupt Enable Bit is cleared (interrupt
disabled) or the GIE bit is cleared (all
interrupts
interrupt, clear the interrupt flag, to ensure
that the program does not immediately
branch to the peripheral interrupt service
routine
W:
R:
U:
disabled).
Writable
Readable
Unimplemented,
read as '0'
PIC14000
Before
DS40122B-page 19
enabling