PIC16C63-04/SO Microchip Technology, PIC16C63-04/SO Datasheet - Page 9

IC MCU OTP 4KX14 PWM 28SOIC

PIC16C63-04/SO

Manufacturer Part Number
PIC16C63-04/SO
Description
IC MCU OTP 4KX14 PWM 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C63-04/SO

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Oscillator Type
External
Core Processor
PIC
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC16C
No. Of I/o's
22
Ram Memory Size
192Byte
Cpu Speed
20MHz
No. Of Timers
3
No. Of Pwm
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
Eeprom Size
-
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.0
The high performance of the PIC16CXX family can be
attributed to a number of architectural features com-
monly found in RISC microprocessors. To begin with,
the PIC16CXX uses a Harvard architecture, in which,
program and data are accessed from separate memo-
ries using separate buses. This improves bandwidth
over traditional von Neumann architecture where pro-
gram and data may be fetched from the same memory
using the same bus. Separating program and data bus-
ses further allows instructions to be sized differently
than 8-bit wide data words. Instruction opcodes are
14-bits wide making it possible to have all single word
instructions. A 14-bit wide program memory access
bus fetches a 14-bit instruction in a single cycle. A two-
stage pipeline overlaps fetch and execution of instruc-
tions (Example 3-1). Consequently, all instructions exe-
cute in a single cycle (200 ns @ 20 MHz) except for
program branches.
The PIC16C61 addresses 1K x 14 of program memory.
The PIC16C62/62A/R62/64/64A/R64 address 2K x 14 of
program memory, and the PIC16C63/R63/65/65A/R65
devices address 4K x 14 of program memory. The
PIC16C66/67 address 8K x 14 program memory. All
program memory is internal.
The PIC16CXX can directly or indirectly address its
register files or data memory. All special function reg-
isters including the program counter are mapped in
the data memory. The PIC16CXX has an orthogonal
(symmetrical) instruction set that makes it possible to
carry out any operation on any register using any
addressing mode. This symmetrical nature and lack of
“special optimal situations” makes programming with
the PIC16CXX simple yet efficient, thus significantly
reducing the learning curve.
1997 Microchip Technology Inc.
ARCHITECTURAL OVERVIEW
The PIC16CXX device contains an 8-bit ALU and work-
ing register (W). The ALU is a general purpose arith-
metic unit. It performs arithmetic and Boolean functions
between data in the working register and any register
file.
The ALU is 8-bits wide and capable of addition, sub-
traction, shift, and logical operations. Unless otherwise
mentioned, arithmetic operations are two's comple-
ment in nature. In two-operand instructions, typically
one operand is the working register (W register), the
other operand is a file register or an immediate con-
stant. In single operand instructions, the operand is
either the W register or a file register.
The W register is an 8-bit working register used for ALU
operations. It is not an addressable register.
Depending upon the instruction executed, the ALU may
affect the values of the Carry (C), Digit Carry (DC), and
Zero (Z) bits in the STATUS register. Bits C and DC
operate as a borrow and digit borrow out bit, respec-
tively, in subtraction. See the SUBLW and SUBWF
instructions for examples.
PIC16C6X
DS30234D-page 9

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