PIC16C63-04/SO Microchip Technology, PIC16C63-04/SO Datasheet - Page 132

• Manufacturer Part Number: PIC16C63-04/SO
• Description: IC MCU OTP 4KX14 PWM 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C63-04/SO

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Oscillator Type: External
• Core Processor: PIC
• Speed: 4MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC16C
• No. Of I/o's: 22
• Ram Memory Size: 192Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• No. Of Pwm: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16C6X
TABLE 13-12: INITIALIZATION CONDITIONS FOR ALL REGISTERS
DS30234D-page 132
W
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON 61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
RCSTA
TXREG
RCREG
CCPR2L
CCPR2H
CCP2CON 61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
OPTION
TRISA
TRISB
Legend: u = unchanged,
Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
Register
2: When the wake-up is due to an interrupt and the global enable bit, GIE is set, the PC is loaded with the interrupt vector (0004h)
3: See Table 13-10 and Table 13-11 for reset value for specific conditions.
after execution of PC + 1.
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
x = unknown,
Applicable Devices
- = unimplemented bit read as '0',
Power-on Reset
xxxx xxxx
xxxx xxxx
0001 1xxx
xxxx xxxx
---x xxxx
--xx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- -xxx
---0 0000
0000 000x
00-- 0000
0000 0000
---- ---0
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
-000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 -00x
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
1111 1111
---1 1111
--11 1111
1111 1111
Brown-out
0000h
Reset
N/A
q = value depends on condition.
MCLR Reset during:
– normal operation
– SLEEP
WDT Reset
000q quuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---u uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
---0 0000
0000 000u
00-- 0000
0000 0000
---- ---0
uuuu uuuu
uuuu uuuu
--uu uuuu
0000 0000
-000 0000
uuuu uuuu
0000 0000
uuuu uuuu
uuuu uuuu
--00 0000
0000 -00x
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 0000
1111 1111
---1 1111
--11 1111
1111 1111
1997 Microchip Technology Inc.
0000h
N/A
(3)
Wake-up via
interrupt or
WDT Wake-up
uuuq quuu
uuuu uuuu
uu-- uuuu
uuuu uuuu
---- ---u
uuuu uuuu
uuuu uuuu
uuuu uuuu
---u uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
---u uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---u uuuu
--uu uuuu
uuuu uuuu
PC + 1
N/A
(2)
(3)
(1)
(1)
(1)
(2)