ATMEGA3250V-8AU Atmel, ATMEGA3250V-8AU Datasheet - Page 58

IC AVR MCU 32K 8MHZ 100TQFP

ATMEGA3250V-8AU

Manufacturer Part Number
ATMEGA3250V-8AU
Description
IC AVR MCU 32K 8MHZ 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA3250V-8AU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, UART, USI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
100TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK504 - STARTER KIT AVR EXP MOD 100P LCD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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12.2.4
12.2.5
2570M–AVR–04/11
PCMSK3 – Pin Change Mask Register 3
PCMSK2 – Pin Change Mask Register 2
corresponding Interrupt Vector. The flag is cleared when the interrupt routine is executed. Alter-
natively, the flag can be cleared by writing a logical one to it.
This bit is reserved bit in ATmega325/645 and will always be read as zero.
• Bit 6– PCIF2: Pin Change Interrupt Flag 2
When a logic change on any PCINT24..16 pin triggers an interrupt request, PCIF2 becomes set
(one). If the I-bit in SREG and the PCIE2 bit in EIMSK are set (one), the MCU will jump to the
corresponding Interrupt Vector. The flag is cleared when the interrupt routine is executed. Alter-
natively, the flag can be cleared by writing a logical one to it.
This bit is reserved bit in ATmega325/645 and will always be read as zero.
• Bit 5– PCIF1: Pin Change Interrupt Flag 1
When a logic change on any PCINT15..8 pin triggers an interrupt request, PCIF1 becomes set
(one). If the I-bit in SREG and the PCIE1 bit in EIMSK are set (one), the MCU will jump to the
corresponding Interrupt Vector. The flag is cleared when the interrupt routine is executed. Alter-
natively, the flag can be cleared by writing a logical one to it.
• Bit 4– PCIF0: Pin Change Interrupt Flag 0
When a logic change on any PCINT7..0 pin triggers an interrupt request, PCIF0 becomes set
(one). If the I-bit in SREG and the PCIE0 bit in EIMSK are set (one), the MCU will jump to the
corresponding Interrupt Vector. The flag is cleared when the interrupt routine is executed. Alter-
natively, the flag can be cleared by writing a logical one to it.
• Bit 0 – INTF0: External Interrupt Flag 0
When an edge or logic change on the INT0 pin triggers an interrupt request, INTF0 becomes set
(one). If the I-bit in SREG and the INT0 bit in EIMSK are set (one), the MCU will jump to the cor-
responding Interrupt Vector. The flag is cleared when the interrupt routine is executed.
Alternatively, the flag can be cleared by writing a logical one to it. This flag is always cleared
when INT0 is configured as a level interrupt.
• Bit 6:0 – PCINT30:24: Pin Change Enable Mask 30:24
Each PCINT30:24-bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT30:24 is set and the PCIE3 bit in EIMSK is set, pin change interrupt is enabled on
the corresponding I/O pin. If PCINT30:24 is cleared, pin change interrupt on the corresponding
I/O pin is disabled.
Bit
(0x6D)
Read/Write
Initial
Value
Bit
(0x73)
Read/Write
Initial Value
PCINT23
R/W
7
0
R
7
0
PCINT22
PCINT30
R/W
R/W
6
0
6
0
(1)
(1)
PCINT21
PCINT29
R/W
R/W
5
0
5
0
PCINT20
PCINT28
R/W
R/W
4
0
4
0
ATmega325/3250/645/6450
PCINT19
PCINT27
R/W
R/W
3
0
3
0
PCINT18
PCINT26
R/W
R/W
2
0
2
0
PCINT17
PCINT25
R/W
R/W
1
0
1
0
PCINT16
PCINT24
R/W
R/W
0
0
0
0
PCMSK2
PCMSK3
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