DSPIC30F2020-30I/MM Microchip Technology, DSPIC30F2020-30I/MM Datasheet - Page 7
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DSPIC30F2020-30I/MM
Manufacturer Part Number
DSPIC30F2020-30I/MM
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.AC164335.pdf
(286 pages)
2.DM300023.pdf
(22 pages)
3.DM300023.pdf
(18 pages)
4.DSPIC30F2011-20ISO.pdf
(66 pages)
5.DSPIC30F2011-20IP.pdf
(26 pages)
6.DSPIC30F1010-30ISO.pdf
(26 pages)
7.DSPIC30F1010-30ISO.pdf
(50 pages)
Specifications of DSPIC30F2020-30I/MM
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Core Frequency
15MHz
Core Supply Voltage
3.3V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Package
28QFN-S EP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300023 - KIT DEMO DSPICDEM SMPS BUCKAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F2020-30I/MMB32
Manufacturer:
Microchip Technology
Quantity:
135
5.5
The term “Blank Check” means to verify whether the
device has been successfully erased and has no
programmed memory cells. A blank or erased memory
cell reads as a ‘1’. The following memories must be
blank checked:
• All implemented code memory
• All Configuration bits (for their default value)
The Device ID registers (0xFF0000:0xFF0002) can be
ignored by the Blank Check since this region stores
device information that cannot be erased. Additionally,
all unimplemented memory space should be ignored
from the Blank Check.
The QBLANK command is used for the Blank Check. It
determines if the code memory is erased by testing
these memory regions. A ‘BLANK’ or ‘NOT BLANK’
response is returned. The READD command is used to
read the Configuration registers. If it is determined that
the device is not blank, it must be erased (see
Section 5.4 “Chip
program the chip.
5.6
5.6.1
The panel architecture for the Flash code memory
array consists of up to 128 rows of thirty-two, 24-bit
instructions. Each panel stores up to 4K instruction
words. Each dsPIC30F SMPS device has one memory
panel (see
TABLE 5-2:
5.6.2
Code memory is programmed with the PROGP
command. PROGP programs one row of code memory
to the memory address specified in the command. The
number of PROGP commands required to program a
device depends on the number of rows that must be
programmed in the device.
A flowchart for programming of code memory is illus-
trated in
words of a dsPIC30F2020 device are programmed.
First, the number of commands to send (called
‘RemainingCmds’ in the flowchart) is set to 128 and the
destination address (called ‘BaseAddress’) is set to ‘0’.
Next, one row in the device is programmed with a PROGP
command. Each PROGP command contains data for one
row of code memory. After the first command is
processed
© 2010 Microchip Technology Inc.
dsPIC30F1010
dsPIC30F2020
dsPIC30F2023
dsPIC30F SMPS
Device
Blank Check
Code Memory Programming
Figure
Table
OVERVIEW
PROGRAMMING METHODOLOGY
successfully,
5-4. In this example, all 4K instruction
5-2).
DEVICE CODE MEMORY SIZE
Code Size
Words)
Erase”) before attempting to
(24-bit
2K
4K
4K
‘RemainingCmds’
Number
Rows
128
128
64
of
Number
Panels
of
1
1
1
is
decremented by ‘1’ and compared to ‘0’. Since there are
more PROGP commands to send, ‘BaseAddress’ is
incremented by 0x40 to point to the next row of memory.
On the second PROGP command, the second row of each
memory panel is programmed. This process is repeated
until the entire device is programmed. No special
handling must be performed when a panel boundary is
crossed.
5.6.3
After programming the code memory, the contents of
memory can be verified to ensure that programming
was successful. Verification requires code memory to
be read back and compared against the copy held in
the programmer’s buffer.
The READP command can be used to read back all the
programmed code memory.
Alternatively, you can have the programmer perform
the verification once the entire device is programmed
using a checksum computation, as described in
Section 6.6 “Checksum
FIGURE 5-4:
BaseAddress =
BaseAddress
+ 0x40
PROGRAMMING VERIFICATION
No
FLOWCHART FOR
PROGRAMMING dsPIC30F
SMPS CODE MEMORY
RemainingCmds =128
Command to Program
BaseAddress = 0x0
RemainingCmds – 1
RemainingCmds =
RemainingCmds
PROGP response
BaseAddress
Send PROGP
Computation”.
PASS?
Finish
Start
‘0’?
Is
Is
Yes
Yes
DS70284C-page 7
Report Error
No
Failure