ATXMEGA32A4-CU Atmel, ATXMEGA32A4-CU Datasheet - Page 259

• Manufacturer Part Number: ATXMEGA32A4-CU
• Description: MCU AVR 32+4 FLASH 49VFBGA
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA32A4-CU

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 49-VFBGA
• Processor Series: ATXMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 5
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 1 Channel
• On-chip Dac: 2 bit, 1 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.4
8077H–AVR–12/09
Address
+0x00
+0x01
+0x02
Register Summary
Name
RXPLCTRL
TXPLCTRL
CTRL
• Bits 3:0 - EVSEL [3:0]: Event Channel Selection
These bits select the event channel source for the IRCOM Receiver, according to
page
is automatically disabled.
Table 22-1.
Bit 7
-
EVSEL[3:0]
259. If event input is selected for the IRCOM Receiver, the input from the USART’s RX pin
0000
0001
0010
0011
0100
0101
0110
0111
1xxx
Bit 6
-
Event Channel Select
Group Configuration
Bit 5
-
CHn
Bit 4
-
RXPLCTRL[7:0]
TXPLCTRL[7:0]
Event Source
None
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
Event System Channelx; x = {0, …,7}
Bit 3
Bit 2
EVSEL[3:0]
Bit 1
XMEGA A
Bit 0
Table 22-1 on
Page
258
258
258
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