AT89C51RC2-SLSUM Atmel, AT89C51RC2-SLSUM Datasheet - Page 113

IC 8051 MCU FLASH 32K 44PLCC

AT89C51RC2-SLSUM

Manufacturer Part Number
AT89C51RC2-SLSUM
Description
IC 8051 MCU FLASH 32K 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51RC2-SLSUM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
60MHz
Interface Type
SPI/UART
Total Internal Ram Size
1.25KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1280 B
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
For Use With
AT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant

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External Program Memory
Read Cycle
External Data Memory
Characteristics
4180E–8051–10/06
PORT 0
PORT 2
PSEN
ALE
INSTR IN
OR SFR-P2
ADDRESS
Table 78. Symbol Description
T
LHLL
T
T
LLAX
Symbol
AVLL
T
T
T
T
T
T
T
T
T
T
T
T
T
T
A0-A7
WLWH
QVWX
QVWH
WHQX
RHDX
RHDZ
AVWL
WHLH
RLRH
RLDV
AVDV
LLDV
LLWL
RLAZ
T
AVIV
ADDRESS A8-A15
T
LLIV
T
LLPL
TPLAZ
T
Parameter
RD Pulse Width
WR Pulse Width
RD to Valid Data In
Data Hold After RD
Data Float After RD
ALE to Valid Data In
Address to Valid Data In
ALE to WR or RD
Address to WR or RD
Data Valid to WR Transition
Data set-up to WR High
Data Hold After WR
RD Low to Address Float
RD or WR High to ALE high
PLIV
T
PLPH
INSTR IN
T
PXIX
12 T
CLCL
T
PXIZ
T
PXAV
A0-A7
AT89C51RB2/RC2
ADDRESS A8-A15
INSTR IN
113

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