ATMEGA168-15MZ Atmel, ATMEGA168-15MZ Datasheet - Page 7

• Manufacturer Part Number: ATMEGA168-15MZ
• Description: MCU AVR 16K FLASH 15MHZ 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA168-15MZ

• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 23
• Eeprom Size: 512 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Program Memory Size: 16KB (16K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: I²C, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: 2-Wire, SPI, USART, Serial
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 32QFN EP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3. About Code Examples
4. AVR CPU Core
4.1
4.2
7530I–AVR–02/10
Introduction
Architectural Overview
This documentation contains simple code examples that briefly show how to use various parts of
the device. These code examples assume that the part specific header file is included before
compilation. Be aware that not all C compiler vendors include bit definitions in the header files
and interrupt handling in C is compiler dependent. Please confirm with the C compiler documen-
tation for more details.
This section discusses the AVR core architecture in general. The main function of the CPU core
is to ensure correct program execution. The CPU must therefore be able to access memories,
perform calculations, control peripherals, and handle interrupts.
Figure 4-1.
Control Lines
Instruction
Instruction
Program
Memory
Block Diagram of the AVR Architecture
Register
Decoder
Flash
Program
Counter
ATmega48/88/168 Automotive
and Control
EEPROM
Registrers
I/O Lines
Purpose
General
SRAM
Data Bus 8-bit
Status
32 x 8
Data
ALU
I/O Module 2
Comparator
I/O Module1
I/O Module n
Watchdog
Interrupt
Timer
Analog
Unit
Unit
SPI
7