PIC16LC924-04I/L Microchip Technology, PIC16LC924-04I/L Datasheet - Page 155

• Manufacturer Part Number: PIC16LC924-04I/L
• Description: IC MCU OTP 4KX14 LCD DVR 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC924-04I/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 6 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Core: PIC
• Processor Series: PIC16LC
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Data Ram Size: 176 B
• Data Rom Size: 176 B
• On-chip Adc: 8 bit, 5 Channel
• Number Of Programmable I/os: 25
• Number Of Timers: 3
• Operating Supply Voltage: 2.5 V to 6 V
• Mounting Style: SMD/SMT
• Height: 4.06 mm
• Interface Type: I2C, SPI
• Length: 24.33 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 6 V
• Supply Voltage (min): 2.5 V
• Width: 24.33 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 17-9: SPI MODE REQUIREMENTS
1997 Microchip Technology Inc.
Param
*
†
71A*
72A*
No.
71*
78*
79*
80*
81*
82*
70*
72*
73*
74*
75*
76*
77*
83*
84*
Characterized but not tested.
Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscR
TscF
TscH2doV,
TscL2doV
TdoV2scH,
TdoV2scL
TssL2doV
TscH2ssH,
TscL2ssH
Tb2b
Sym
Characteristic
SS to SCK or SCK input
SCK input high time (slave
mode)
SCK input low time (slave
mode)
Setup time of SDI data input to SCK edge
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SS to SDO output hi-impedance
SCK output rise time (master mode)
SCK output fall time (master mode)
SDO data output valid after SCK edge
SDO data output setup to SCK edge
SDO data output valid after SS edge
SS
Delay between consecutive bytes
after SCK edge
Continuous
Single Byte
Continuous
Single Byte
1.5T
1.5T
1.25T
1.25T
Min
T
T
CY
CY
30
40
30
40
50
50
10
—
—
—
—
—
—
CY
CY
CY
CY
+ 40
+ 40
+
+
Typ†
10
10
10
10
—
—
—
—
—
—
—
—
—
—
—
—
PIC16C9XX
Max
25
25
50
25
25
50
50
—
—
—
—
—
—
—
—
—
DS30444E - page 155
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions