AT90CAN64-16AUR Atmel, AT90CAN64-16AUR Datasheet - Page 111

MCU AVR 64K FLASH 16MHZ 64TQFP

AT90CAN64-16AUR

Manufacturer Part Number
AT90CAN64-16AUR
Description
MCU AVR 64K FLASH 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® 90CANr
Datasheet

Specifications of AT90CAN64-16AUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Data Bus Width
8 bit
Data Ram Size
4 KB
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90CAN64-16AUR
Manufacturer:
Atmel
Quantity:
10 000
12.9.2
7679H–CAN–08/08
Timer/Counter0 Register – TCNT0
Note:
Table 12-4
rect PWM mode.
Table 12-4.
Note:
• Bit 2:0 – CS02:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
Table 12-5.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the compare
match on the following timer clock. Modifying the counter (TCNT0) while the counter is running,
introduces a risk of missing a compare match between TCNT0 and the OCR0A Register.
Bit
Read/Write
Initial Value
CS02
COM0A1
0
0
0
0
1
1
1
1
0
0
1
1
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the com-
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the com-
CS01
pare match is ignored, but the set or clear is done at TOP. See
for more details.
pare match is ignored, but the set or clear is done at TOP. See
page 107
shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to phase cor-
0
0
1
1
0
0
1
1
Compare Output Mode, Phase Correct PWM Mode
Clock Select Bit Description
R/W
7
0
COM0A0
CS00
for more details.
0
1
0
1
0
1
0
1
0
1
0
1
R/W
6
0
Description
No clock source (Timer/Counter stopped)
clk
clk
clk
clk
clk
External clock source on T0 pin. Clock on falling edge.
External clock source on T0 pin. Clock on rising edge.
Description
Normal port operation, OC0A disconnected.
Reserved
Clear OC0A on compare match when up-counting.
Set OC0A on compare match when downcounting.
Set OC0A on compare match when up-counting.
Clear OC0A on compare match when downcounting.
I/O
I/O
I/O
I/O
I/O
R/W
5
0
/(No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
R/W
4
0
TCNT0[7:0]
R/W
3
0
R/W
2
0
AT90CAN32/64/128
R/W
1
0
(1)
“Fast PWM Mode” on page 105
“Phase Correct PWM Mode” on
R/W
0
0
TCNT0
111

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