DSPIC33FJ64MC706-I/PT Microchip Technology, DSPIC33FJ64MC706-I/PT Datasheet - Page 40
![IC DSPIC MCU/DSP 64K 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
DSPIC33FJ64MC706-I/PT
Manufacturer Part Number
DSPIC33FJ64MC706-I/PT
Description
IC DSPIC MCU/DSP 64K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.MA330013.pdf
(370 pages)
2.DSPIC33FJ12GP201-ISO.pdf
(90 pages)
3.DSPIC33FJ64MC506-IPT.pdf
(340 pages)
4.DSPIC33FJ64MC506-IPT.pdf
(30 pages)
Specifications of DSPIC33FJ64MC706-I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Core Frequency
40MHz
Embedded Interface Type
ECAN, I2C, SPI, UART
No. Of I/o's
53
Flash Memory Size
64KB
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To
Package
64TQFP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
53
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
32-chx10-bit|32-chx12-bit
Number Of Timers
9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64MC706-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
DSPIC33FJ64MC706-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC33F
TABLE 9-8:
DS70155C-page 38
Assembly Syntax
BTSC
BTSC
BTSS
BTSS
CP
CP
CP
CP0
CP0
CPB
CPB
CPB
CPSEQ
CPSGT
CPSLT
CPSNE
Note 1:
2:
Bit positions are specified by bit4 (0:15) for word operations.
Conditional skip instructions execute in 1 cycle if the skip is not taken, 2 cycles if the skip is taken over a
one-word instruction and 3 cycles if the skip is taken over a two-word instruction.
f,#bit4
Ws,#bit4
f,#bit4
Ws,#bit4
f
Wb,#lit5
Wb,Ws
f
Ws
f
Wb,#lit5
Wb,Ws
Wb,Wn
Wb,Wn
Wb,Wn
Wb,Wn
COMPARE/SKIP INSTRUCTIONS
Bit test f, skip if clear
Bit test Ws, skip if clear
Bit test f, skip if set
Bit test Ws, skip if set
Compare (f – WREG)
Compare (Wb – lit5)
Compare (Wb – Ws)
Compare (f – 0x0000)
Compare (Ws – 0x0000)
Compare with Borrow (f – WREG – C)
Compare with Borrow (Wb – lit5 – C)
Compare with Borrow (Wb – Ws – C)
Compare Wb with Wn, Skip if Equal (Wb = Wn)
Signed Compare Wb with Wn, Skip if Greater Than (Wb > Wn)
Signed Compare Wb with Wn, Skip if Less Than (Wb < Wn)
Signed Compare Wb with Wn, Skip if Not Equal (Wb ≠ Wn)
Preliminary
Description
© 2005 Microchip Technology Inc.
Words
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Cycles
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